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From: Ciara Loftus <ciara.loftus@intel.com>
To: dev@dpdk.org
Cc: Ciara Loftus <ciara.loftus@intel.com>
Subject: [PATCH v2 3/6] net/iavf: ensure correct conditions for AVX-512 VLAN offload
Date: Wed,  5 Nov 2025 15:26:39 +0000	[thread overview]
Message-ID: <20251105152642.2981673-4-ciara.loftus@intel.com> (raw)
In-Reply-To: <20251105152642.2981673-1-ciara.loftus@intel.com>

Commit 3aa4efa36438 ("net/iavf: support VLAN insertion in AVX512 Tx")
re-enabled VLAN insertion on the AVX-512 path after it was disabled in
commit efe1b63775e8 ("net/iavf: fix VLAN insertion in vector path"). The
initial implementation introduced in commit 4f8259df563a ("net/iavf:
enable Tx outer checksum offload on AVX512") was inconsistent in that if
the vlan tag was to be placed in the L2TAG1 field, the offload was only
performed if IAVF_TX_VLAN_QINQ_OFFLOAD was defined and if the path was
an offload path. However if the vlan tag was to be placed in the L2TAG2
field (requiring a context descriptor), the insert was performed
unconditionally.

When VLAN insertion was re-enabled, these inconsistencies remained. This
commit fixes these and ensures the following two conditions are met
before VLAN insert is offloaded on the AVX-512 path:
1. IAVF_TX_VLAN_QINQ_OFFLOAD is defined (defined by default)
2. The path is an "offload" path

Fixes: 3aa4efa36438 ("net/iavf: support VLAN insertion in AVX512 Tx")

Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
 drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c | 79 +++++++++++--------
 1 file changed, 46 insertions(+), 33 deletions(-)

diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
index 28d83ca3ed..7eb7e47390 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
@@ -2074,14 +2074,17 @@ ctx_vtx1(volatile struct iavf_tx_desc *txdp, struct rte_mbuf *pkt,
 	uint64_t high_ctx_qw = IAVF_TX_DESC_DTYPE_CONTEXT;
 	uint64_t low_ctx_qw = 0;
 
-	if (((pkt->ol_flags & RTE_MBUF_F_TX_VLAN) || offload)) {
-		if (offload)
-			iavf_fill_ctx_desc_tunneling_avx512(&low_ctx_qw, pkt);
-		if ((pkt->ol_flags & RTE_MBUF_F_TX_VLAN) ||
-				(vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2)) {
-			high_ctx_qw |= IAVF_TX_CTX_DESC_IL2TAG2 << IAVF_TXD_CTX_QW1_CMD_SHIFT;
-			low_ctx_qw |= (uint64_t)pkt->vlan_tci << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
+	if (offload) {
+		iavf_fill_ctx_desc_tunneling_avx512(&low_ctx_qw, pkt);
+#ifdef IAVF_TX_VLAN_QINQ_OFFLOAD
+		if (pkt->ol_flags & RTE_MBUF_F_TX_VLAN &&
+				vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) {
+			high_ctx_qw |= IAVF_TX_CTX_DESC_IL2TAG2 <<
+					IAVF_TXD_CTX_QW1_CMD_SHIFT;
+			low_ctx_qw |= (uint64_t)pkt->vlan_tci <<
+					IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
 		}
+#endif
 	}
 	if (IAVF_CHECK_TX_LLDP(pkt))
 		high_ctx_qw |= IAVF_TX_CTX_DESC_SWTCH_UPLINK
@@ -2127,38 +2130,48 @@ ctx_vtx(volatile struct iavf_tx_desc *txdp,
 				((uint64_t)pkt[0]->data_len <<
 					IAVF_TXD_QW1_TX_BUF_SZ_SHIFT);
 
-		if (pkt[1]->ol_flags & RTE_MBUF_F_TX_VLAN &&
-				vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) {
-			hi_ctx_qw1 |=
-				IAVF_TX_CTX_DESC_IL2TAG2 << IAVF_TXD_CTX_QW1_CMD_SHIFT;
-			low_ctx_qw1 |=
-				(uint64_t)pkt[1]->vlan_tci << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
-		}
-		if (pkt[1]->ol_flags & RTE_MBUF_F_TX_QINQ) {
-			uint64_t qinq_tag = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ?
-				(uint64_t)pkt[0]->vlan_tci_outer :
-				(uint64_t)pkt[0]->vlan_tci;
-			hi_ctx_qw1 |= IAVF_TX_CTX_DESC_IL2TAG2 << IAVF_TXD_CTX_QW1_CMD_SHIFT;
-			low_ctx_qw1 |= qinq_tag << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
+#ifdef IAVF_TX_VLAN_QINQ_OFFLOAD
+		if (offload) {
+			if (pkt[1]->ol_flags & RTE_MBUF_F_TX_VLAN &&
+					vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) {
+				hi_ctx_qw1 |=
+					IAVF_TX_CTX_DESC_IL2TAG2 << IAVF_TXD_CTX_QW1_CMD_SHIFT;
+				low_ctx_qw1 |=
+					(uint64_t)pkt[1]->vlan_tci << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
+			}
+			if (pkt[1]->ol_flags & RTE_MBUF_F_TX_QINQ) {
+				uint64_t qinq_tag = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ?
+					(uint64_t)pkt[1]->vlan_tci_outer :
+					(uint64_t)pkt[1]->vlan_tci;
+				hi_ctx_qw1 |= IAVF_TX_CTX_DESC_IL2TAG2 <<
+						IAVF_TXD_CTX_QW1_CMD_SHIFT;
+				low_ctx_qw1 |= qinq_tag << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
+			}
 		}
+#endif
 		if (IAVF_CHECK_TX_LLDP(pkt[1]))
 			hi_ctx_qw1 |= IAVF_TX_CTX_DESC_SWTCH_UPLINK
 				<< IAVF_TXD_CTX_QW1_CMD_SHIFT;
 
-		if (pkt[0]->ol_flags & RTE_MBUF_F_TX_VLAN &&
-				vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) {
-			hi_ctx_qw0 |=
-				IAVF_TX_CTX_DESC_IL2TAG2 << IAVF_TXD_CTX_QW1_CMD_SHIFT;
-			low_ctx_qw0 |=
-				(uint64_t)pkt[0]->vlan_tci << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
-		}
-		if (pkt[0]->ol_flags & RTE_MBUF_F_TX_QINQ) {
-			uint64_t qinq_tag = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ?
-				(uint64_t)pkt[0]->vlan_tci_outer :
-				(uint64_t)pkt[0]->vlan_tci;
-			hi_ctx_qw0 |= IAVF_TX_CTX_DESC_IL2TAG2 << IAVF_TXD_CTX_QW1_CMD_SHIFT;
-			low_ctx_qw0 |= qinq_tag << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
+#ifdef IAVF_TX_VLAN_QINQ_OFFLOAD
+		if (offload) {
+			if (pkt[0]->ol_flags & RTE_MBUF_F_TX_VLAN &&
+					vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) {
+				hi_ctx_qw0 |=
+					IAVF_TX_CTX_DESC_IL2TAG2 << IAVF_TXD_CTX_QW1_CMD_SHIFT;
+				low_ctx_qw0 |=
+					(uint64_t)pkt[0]->vlan_tci << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
+			}
+			if (pkt[0]->ol_flags & RTE_MBUF_F_TX_QINQ) {
+				uint64_t qinq_tag = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ?
+					(uint64_t)pkt[0]->vlan_tci_outer :
+					(uint64_t)pkt[0]->vlan_tci;
+				hi_ctx_qw0 |= IAVF_TX_CTX_DESC_IL2TAG2 <<
+						IAVF_TXD_CTX_QW1_CMD_SHIFT;
+				low_ctx_qw0 |= qinq_tag << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
+			}
 		}
+#endif
 		if (IAVF_CHECK_TX_LLDP(pkt[0]))
 			hi_ctx_qw0 |= IAVF_TX_CTX_DESC_SWTCH_UPLINK
 				<< IAVF_TXD_CTX_QW1_CMD_SHIFT;
-- 
2.34.1


  parent reply	other threads:[~2025-11-05 15:27 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-31 15:22 [PATCH 0/2] Fixes for iavf VLAN insertion offload Ciara Loftus
2025-10-31 15:22 ` [PATCH 1/2] net/iavf: fix AVX-512 double VLAN (QinQ) insertion Ciara Loftus
2025-11-04 17:13   ` Bruce Richardson
2025-11-04 17:16     ` Bruce Richardson
2025-10-31 15:22 ` [PATCH 2/2] net/iavf: fix single VLAN insertion positioning Ciara Loftus
2025-11-04 17:21   ` Bruce Richardson
2025-11-04 17:28     ` Bruce Richardson
2025-11-05 15:26 ` [PATCH v2 0/6] Fixes for iavf VLAN insertion offload Ciara Loftus
2025-11-05 15:26   ` [PATCH v2 1/6] net/iavf: fix compilation with VLAN insertion disabled Ciara Loftus
2025-11-05 19:31     ` Stephen Hemminger
2025-11-05 15:26   ` [PATCH v2 2/6] net/iavf: remove duplication in AVX-512 VLAN insert logic Ciara Loftus
2025-11-05 15:26   ` Ciara Loftus [this message]
2025-11-05 15:26   ` [PATCH v2 4/6] net/iavf: fix single VLAN insertion positioning Ciara Loftus
2025-11-05 15:26   ` [PATCH v2 5/6] net/iavf: fix QinQ insertion for single packet Tx Ciara Loftus
2025-11-05 15:26   ` [PATCH v2 6/6] net/iavf: fix QinQ insertion with mbuf flags VLAN and QINQ Ciara Loftus

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