From: Ciara Loftus <ciara.loftus@intel.com>
To: dev@dpdk.org
Cc: Ciara Loftus <ciara.loftus@intel.com>
Subject: [PATCH v2 4/6] net/iavf: fix single VLAN insertion positioning
Date: Wed, 5 Nov 2025 15:26:40 +0000 [thread overview]
Message-ID: <20251105152642.2981673-5-ciara.loftus@intel.com> (raw)
In-Reply-To: <20251105152642.2981673-1-ciara.loftus@intel.com>
Commit fdc37964c2bf ("net/iavf: support QinQ insertion offload in scalar
Tx") broke single VLAN insertion offload in cases where the v2 offload
capability and both inner and outer insertion were supported because it
caused inner VLAN tags to be inserted instead of outer.
When an iavf tx queue is being set up, if v2 offload capability is
supported, the driver queries the insertion capabilities and takes note
of where VLAN tags should be placed in the transmit and/or context
descriptors for insertion offload. In the offending commit, when both
inner and outer insertion was reported as supported, the flag
"vlan_flag" was changed to hold the location for inner VLAN tags.
However this caused inner VLAN tags to be inserted in the case of single
VLAN offload which is incorrect behaviour for this use case.
To fix this, revert the "vlan_flag" back to holding the location for
outer VLAN tags and update the datapath code accordingly.
Fixes: fdc37964c2bf ("net/iavf: support QinQ insertion offload in scalar Tx")
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/iavf/iavf_rxtx.c | 53 +++++++------------
drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c | 8 +--
drivers/net/intel/iavf/iavf_rxtx_vec_common.h | 5 +-
3 files changed, 26 insertions(+), 40 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index a3ef13c791..ea49059f83 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -799,32 +799,17 @@ iavf_dev_tx_queue_setup(struct rte_eth_dev *dev,
&adapter->vf.vlan_v2_caps.offloads.insertion_support;
uint32_t insertion_cap;
- if (insertion_support->outer == VIRTCHNL_VLAN_UNSUPPORTED ||
- insertion_support->inner == VIRTCHNL_VLAN_UNSUPPORTED) {
- /* Only one insertion is supported. */
- if (insertion_support->outer)
- insertion_cap = insertion_support->outer;
- else
- insertion_cap = insertion_support->inner;
-
- if (insertion_cap & VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1) {
- txq->vlan_flag = IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1;
- PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: L2TAG1");
- } else if (insertion_cap & VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2) {
- txq->vlan_flag = IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2;
- PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: L2TAG2");
- }
- } else {
- /* Both outer and inner insertion supported. */
- if (insertion_support->inner & VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1) {
- txq->vlan_flag = IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1;
- PMD_INIT_LOG(DEBUG, "Inner VLAN insertion_cap: L2TAG1");
- PMD_INIT_LOG(DEBUG, "Outer VLAN insertion_cap: L2TAG2");
- } else {
- txq->vlan_flag = IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2;
- PMD_INIT_LOG(DEBUG, "Inner VLAN insertion_cap: L2TAG2");
- PMD_INIT_LOG(DEBUG, "Outer VLAN insertion_cap: L2TAG1");
- }
+ if (insertion_support->outer)
+ insertion_cap = insertion_support->outer;
+ else
+ insertion_cap = insertion_support->inner;
+
+ if (insertion_cap & VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1) {
+ txq->vlan_flag = IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1;
+ PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: L2TAG1");
+ } else if (insertion_cap & VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2) {
+ txq->vlan_flag = IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2;
+ PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: L2TAG2");
}
} else {
txq->vlan_flag = IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1;
@@ -2600,12 +2585,12 @@ iavf_fill_context_desc(volatile struct iavf_tx_context_desc *desc,
desc_qws->qw0 = rte_cpu_to_le_64(desc_qws->qw0);
desc_qws->qw1 = rte_cpu_to_le_64(desc_qws->qw1);
- if (vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2)
- desc->l2tag2 = m->vlan_tci;
-
+ /* vlan_flag specifies VLAN tag location for VLAN, and outer tag location for QinQ. */
if (m->ol_flags & RTE_MBUF_F_TX_QINQ)
- desc->l2tag2 = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ? m->vlan_tci :
- m->vlan_tci_outer;
+ desc->l2tag2 = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ? m->vlan_tci_outer :
+ m->vlan_tci;
+ else if (m->ol_flags & RTE_MBUF_F_TX_VLAN && vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2)
+ desc->l2tag2 = m->vlan_tci;
}
@@ -2660,11 +2645,11 @@ iavf_build_data_desc_cmd_offset_fields(volatile uint64_t *qw1,
l2tag1 |= m->vlan_tci;
}
- /* Descriptor based QinQ insertion */
+ /* Descriptor based QinQ insertion. vlan_flag specifies outer tag location. */
if (m->ol_flags & RTE_MBUF_F_TX_QINQ) {
command |= (uint64_t)IAVF_TX_DESC_CMD_IL2TAG1;
- l2tag1 = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1 ? m->vlan_tci :
- m->vlan_tci_outer;
+ l2tag1 = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1 ? m->vlan_tci_outer :
+ m->vlan_tci;
}
if ((m->ol_flags &
diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
index 7eb7e47390..6182988612 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_avx512.c
@@ -2141,8 +2141,8 @@ ctx_vtx(volatile struct iavf_tx_desc *txdp,
}
if (pkt[1]->ol_flags & RTE_MBUF_F_TX_QINQ) {
uint64_t qinq_tag = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ?
- (uint64_t)pkt[1]->vlan_tci_outer :
- (uint64_t)pkt[1]->vlan_tci;
+ (uint64_t)pkt[1]->vlan_tci :
+ (uint64_t)pkt[1]->vlan_tci_outer;
hi_ctx_qw1 |= IAVF_TX_CTX_DESC_IL2TAG2 <<
IAVF_TXD_CTX_QW1_CMD_SHIFT;
low_ctx_qw1 |= qinq_tag << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
@@ -2164,8 +2164,8 @@ ctx_vtx(volatile struct iavf_tx_desc *txdp,
}
if (pkt[0]->ol_flags & RTE_MBUF_F_TX_QINQ) {
uint64_t qinq_tag = vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2 ?
- (uint64_t)pkt[0]->vlan_tci_outer :
- (uint64_t)pkt[0]->vlan_tci;
+ (uint64_t)pkt[0]->vlan_tci :
+ (uint64_t)pkt[0]->vlan_tci_outer;
hi_ctx_qw0 |= IAVF_TX_CTX_DESC_IL2TAG2 <<
IAVF_TXD_CTX_QW1_CMD_SHIFT;
low_ctx_qw0 |= qinq_tag << IAVF_TXD_CTX_QW0_L2TAG2_PARAM;
diff --git a/drivers/net/intel/iavf/iavf_rxtx_vec_common.h b/drivers/net/intel/iavf/iavf_rxtx_vec_common.h
index 5ac96f239b..36150f0f65 100644
--- a/drivers/net/intel/iavf/iavf_rxtx_vec_common.h
+++ b/drivers/net/intel/iavf/iavf_rxtx_vec_common.h
@@ -238,11 +238,12 @@ iavf_txd_enable_offload(__rte_unused struct rte_mbuf *tx_pkt,
if (ol_flags & RTE_MBUF_F_TX_QINQ) {
td_cmd |= IAVF_TX_DESC_CMD_IL2TAG1;
+ /* vlan_flag specifies outer tag location for QinQ. */
if (vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1)
- *txd_hi |= ((uint64_t)tx_pkt->vlan_tci <<
+ *txd_hi |= ((uint64_t)tx_pkt->vlan_tci_outer <<
IAVF_TXD_QW1_L2TAG1_SHIFT);
else
- *txd_hi |= ((uint64_t)tx_pkt->vlan_tci_outer <<
+ *txd_hi |= ((uint64_t)tx_pkt->vlan_tci <<
IAVF_TXD_QW1_L2TAG1_SHIFT);
}
#endif
--
2.34.1
next prev parent reply other threads:[~2025-11-05 15:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-31 15:22 [PATCH 0/2] Fixes for iavf VLAN insertion offload Ciara Loftus
2025-10-31 15:22 ` [PATCH 1/2] net/iavf: fix AVX-512 double VLAN (QinQ) insertion Ciara Loftus
2025-11-04 17:13 ` Bruce Richardson
2025-11-04 17:16 ` Bruce Richardson
2025-10-31 15:22 ` [PATCH 2/2] net/iavf: fix single VLAN insertion positioning Ciara Loftus
2025-11-04 17:21 ` Bruce Richardson
2025-11-04 17:28 ` Bruce Richardson
2025-11-05 15:26 ` [PATCH v2 0/6] Fixes for iavf VLAN insertion offload Ciara Loftus
2025-11-05 15:26 ` [PATCH v2 1/6] net/iavf: fix compilation with VLAN insertion disabled Ciara Loftus
2025-11-05 19:31 ` Stephen Hemminger
2025-11-05 15:26 ` [PATCH v2 2/6] net/iavf: remove duplication in AVX-512 VLAN insert logic Ciara Loftus
2025-11-05 15:26 ` [PATCH v2 3/6] net/iavf: ensure correct conditions for AVX-512 VLAN offload Ciara Loftus
2025-11-05 15:26 ` Ciara Loftus [this message]
2025-11-05 15:26 ` [PATCH v2 5/6] net/iavf: fix QinQ insertion for single packet Tx Ciara Loftus
2025-11-05 15:26 ` [PATCH v2 6/6] net/iavf: fix QinQ insertion with mbuf flags VLAN and QINQ Ciara Loftus
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251105152642.2981673-5-ciara.loftus@intel.com \
--to=ciara.loftus@intel.com \
--cc=dev@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).