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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CO1PEPF000075EF.mail.protection.outlook.com (10.167.249.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9298.6 via Frontend Transport; Wed, 5 Nov 2025 16:54:35 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 5 Nov 2025 08:54:10 -0800 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 5 Nov 2025 08:54:07 -0800 From: Dariusz Sosnowski To: Viacheslav Ovsiienko , Bing Zhao , Ori Kam , Suanming Mou , Matan Azrad CC: , Raslan Darawsheh Subject: [PATCH v2 0/5] net/mlx5: support count and age actions on root group Date: Wed, 5 Nov 2025 17:52:53 +0100 Message-ID: <20251105165258.1396352-1-dsosnowski@nvidia.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251104174612.1341962-1-dsosnowski@nvidia.com> References: <20251104174612.1341962-1-dsosnowski@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075EF:EE_|MW6PR12MB8836:EE_ X-MS-Office365-Filtering-Correlation-Id: dbe1f776-68c5-48a2-ecf3-08de1c8bffde X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2025 16:54:35.0646 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dbe1f776-68c5-48a2-ecf3-08de1c8bffde X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075EF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8836 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When working with HW Steering flow engine (HWS, dv_flow_en=2), mlx5 PMD does not support using count and age flow actions on flow group 0 i.e., root table. Flow rules on root table are special in a sense that they are created through mlx5 kernel driver using rdma-core mlx5dv_create_flow() API. This API however does not support using counters from FW-allocated counter bulks which contain more than 1 counter (extensively used with HWS to optimize allocations). This affects age flow action as well, because it's implementation in mlx5 PMD relies on counters. rdma-core version v60.0 added a new flow action type to mlx5dv_create_flow() API - MLX5DV_FLOW_ACTION_COUNTERS_DEVX_WITH_OFFSET - which allows the use of counters from bigger FW-allocated counter bulks. This in turn allows mlx5 PMD to extend count and age flow action support to group 0. This patchset implements that support. Patchset contains: - Patch 1 - Fixes for indirect flow action error reporting. - Patch 2 - Adds detection of MLX5DV_FLOW_ACTION_COUNTERS_DEVX_WITH_OFFSET in rdma-core at build time. - Patch 3 - Adds support for counter action in HWS layer whenever MLX5DV_FLOW_ACTION_COUNTERS_DEVX_WITH_OFFSET is available. - Patch 4 - Reworks for group 0/root table checks to allow easier implementaiton - Patch 5 - Enables support of count and age flow action in group 0, in flow API implementation with HWS. v2: - Added logging in mlx5dr action creation whenever count is not supported on root. - Removed redundant is_root_supported field from mlx5_hws_cnt_pool struct and replaced it with compile time checks, since feature depends on version of rdma-core available at compilation. - Unify error messages for unsupported count/age action, so all refer to root table. - Added Fixes tags to patch 4 from v1 and moved it as patch no. 1. Dariusz Sosnowski (5): net/mlx5: fix error reporting on masked indirect actions common/mlx5: detect DevX counters support in rdma-core net/mlx5/hws: support counter from DevX bulk on root net/mlx5: rework root group checks in table create net/mlx5: support count and age on root group doc/guides/nics/mlx5.rst | 34 ++++--- doc/guides/rel_notes/release_25_11.rst | 4 + drivers/common/mlx5/linux/meson.build | 2 + drivers/net/mlx5/hws/mlx5dr.h | 14 +++ drivers/net/mlx5/hws/mlx5dr_action.c | 20 ++-- drivers/net/mlx5/mlx5_flow.h | 17 ++++ drivers/net/mlx5/mlx5_flow_hw.c | 123 ++++++++++++++----------- drivers/net/mlx5/mlx5_hws_cnt.c | 42 +++++++-- drivers/net/mlx5/mlx5_hws_cnt.h | 16 +++- 9 files changed, 185 insertions(+), 87 deletions(-) -- 2.39.5