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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2025 16:54:40.1957 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6a102dab-933f-41ce-c232-08de1c8c02f4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004687.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS5PPFFF21E27DC X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds support for using flow counters with offsets within a DevX bulk, in flow rules on root table, in HWS layer. Signed-off-by: Dariusz Sosnowski --- drivers/net/mlx5/hws/mlx5dr.h | 14 ++++++++++++++ drivers/net/mlx5/hws/mlx5dr_action.c | 20 +++++++++++--------- 2 files changed, 25 insertions(+), 9 deletions(-) diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h index 58526fc08e..c13316305f 100644 --- a/drivers/net/mlx5/hws/mlx5dr.h +++ b/drivers/net/mlx5/hws/mlx5dr.h @@ -738,6 +738,20 @@ mlx5dr_action_create_counter(struct mlx5dr_context *ctx, struct mlx5dr_devx_obj *obj, uint32_t flags); +/* Check if counter action on root table is supported. + * + * @return true if counter action on root table is supported. + */ +static inline bool +mlx5dr_action_counter_root_is_supported(void) +{ +#ifdef HAVE_MLX5DV_FLOW_ACTION_COUNTERS_DEVX_WITH_OFFSET + return true; +#else + return false; +#endif +} + /* Create direct rule reformat action. * * @param[in] ctx diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c index d765d57a8f..b35bf07c3c 100644 --- a/drivers/net/mlx5/hws/mlx5dr_action.c +++ b/drivers/net/mlx5/hws/mlx5dr_action.c @@ -832,16 +832,11 @@ int mlx5dr_action_root_build_attr(struct mlx5dr_rule_action rule_actions[], attr[i].type = MLX5DV_FLOW_ACTION_IBV_FLOW_ACTION; attr[i].action = action->flow_action; break; -#ifdef HAVE_IBV_FLOW_DEVX_COUNTERS +#ifdef HAVE_MLX5DV_FLOW_ACTION_COUNTERS_DEVX_WITH_OFFSET case MLX5DR_ACTION_TYP_CTR: - attr[i].type = MLX5DV_FLOW_ACTION_COUNTERS_DEVX; - attr[i].obj = action->devx_obj; - - if (rule_actions[i].counter.offset) { - DR_LOG(ERR, "Counter offset not supported over root"); - rte_errno = ENOTSUP; - return rte_errno; - } + attr[i].type = MLX5DV_FLOW_ACTION_COUNTERS_DEVX_WITH_OFFSET; + attr[i].bulk_obj.obj = action->devx_obj; + attr[i].bulk_obj.offset = rule_actions[i].counter.offset; break; #endif default: @@ -1712,6 +1707,13 @@ mlx5dr_action_create_counter(struct mlx5dr_context *ctx, return NULL; } + if (mlx5dr_action_is_root_flags(flags) && + !mlx5dr_action_counter_root_is_supported()) { + DR_LOG(ERR, "Counter action is not supported on root"); + rte_errno = ENOTSUP; + return NULL; + } + action = mlx5dr_action_create_generic(ctx, flags, MLX5DR_ACTION_TYP_CTR); if (!action) return NULL; -- 2.39.5