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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN1PEPF00004689.mail.protection.outlook.com (10.167.243.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9298.6 via Frontend Transport; Wed, 5 Nov 2025 16:54:41 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 5 Nov 2025 08:54:19 -0800 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 5 Nov 2025 08:54:17 -0800 From: Dariusz Sosnowski To: Viacheslav Ovsiienko , Bing Zhao , Ori Kam , Suanming Mou , Matan Azrad CC: , Raslan Darawsheh Subject: [PATCH v2 4/5] net/mlx5: rework root group checks in table create Date: Wed, 5 Nov 2025 17:52:57 +0100 Message-ID: <20251105165258.1396352-5-dsosnowski@nvidia.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251105165258.1396352-1-dsosnowski@nvidia.com> References: <20251104174612.1341962-1-dsosnowski@nvidia.com> <20251105165258.1396352-1-dsosnowski@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004689:EE_|CY5PR12MB6573:EE_ X-MS-Office365-Filtering-Correlation-Id: ebeff696-8d0e-426c-8541-08de1c8c0407 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(1800799024)(82310400026)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2025 16:54:41.9797 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ebeff696-8d0e-426c-8541-08de1c8c0407 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004689.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6573 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Before this patch, during flow actions translation done in template table create, there were a lot of checks for group with index 0. This group is special, because flow rules in that group are created through mlx5 kernel driver. For this reason, this group is referred to as root group or root table. This patch reworks these group index checks for clarity: - A dedicated function for checking if group index refers to root group is added. - All direct group index checks in actions translation are replaced with a check for result of that function. - Redundant group translation checks in actions translation is removed. Group indexes are already translated at that point. - Root group check for internal default miss action is removed. This action is supported on root group assuming rdma-core supports it. If rdma-core core does not support it, then HWS layer will reject accordingly. Signed-off-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5_flow.h | 17 +++++++++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 32 +++++++------------------------- 2 files changed, 24 insertions(+), 25 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index cfdd47ef50..9b0afa427e 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1658,6 +1658,23 @@ struct mlx5_flow_group { struct mlx5_list *matchers; }; +/** + * Returns true if a group with the given index is a root group. + * + * @param group_id + * Group index. + * It is assumed that provided index is already translated from user index to PMD index + * (as is for transfer groups for example). + * + * @returns + * True if group is a root group. + * False otherwise. + */ +static inline bool +mlx5_group_id_is_root(uint32_t group_id) +{ + return group_id == 0; +} #define MLX5_HW_TBL_MAX_ITEM_TEMPLATE 32 #define MLX5_HW_TBL_MAX_ACTION_TEMPLATE 32 diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 19975280c9..bab081e775 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -2523,7 +2523,7 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, unsigned int of_vlan_offset; uint32_t ct_idx; int ret, err; - uint32_t target_grp = 0; + bool is_root = mlx5_group_id_is_root(cfg->attr.flow_attr.group); bool unified_fdb = is_unified_fdb(priv); flow_hw_modify_field_init(&mhdr, at); @@ -2535,7 +2535,7 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, switch ((int)actions->type) { case RTE_FLOW_ACTION_TYPE_INDIRECT_LIST: - if (!attr->group) { + if (is_root) { DRV_LOG(ERR, "Indirect action is not supported in root table."); goto err; } @@ -2545,7 +2545,7 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, goto err; break; case RTE_FLOW_ACTION_TYPE_INDIRECT: - if (!attr->group) { + if (is_root) { DRV_LOG(ERR, "Indirect action is not supported in root table."); goto err; } @@ -2566,7 +2566,7 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, priv->hw_drop[!!attr->group]; break; case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR: - if (!attr->group) { + if (is_root) { DRV_LOG(ERR, "Port representor is not supported in root table."); goto err; } @@ -2761,11 +2761,7 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, recom_type = MLX5DR_ACTION_TYP_POP_IPV6_ROUTE_EXT; break; case RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL: - ret = flow_hw_translate_group(dev, cfg, attr->group, - &target_grp, &sub_error); - if (ret) - goto err; - if (target_grp == 0) { + if (is_root) { __flow_hw_action_template_destroy(dev, acts); rte_flow_error_set(&sub_error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, @@ -2789,11 +2785,7 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, goto err; break; case RTE_FLOW_ACTION_TYPE_AGE: - ret = flow_hw_translate_group(dev, cfg, attr->group, - &target_grp, &sub_error); - if (ret) - goto err; - if (target_grp == 0) { + if (is_root) { __flow_hw_action_template_destroy(dev, acts); rte_flow_error_set(&sub_error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, @@ -2808,11 +2800,7 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, goto err; break; case RTE_FLOW_ACTION_TYPE_COUNT: - ret = flow_hw_translate_group(dev, cfg, attr->group, - &target_grp, &sub_error); - if (ret) - goto err; - if (target_grp == 0) { + if (is_root) { __flow_hw_action_template_destroy(dev, acts); rte_flow_error_set(&sub_error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, @@ -2871,12 +2859,6 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, goto err; break; case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS: - /* Internal, can be skipped. */ - if (!!attr->group) { - DRV_LOG(ERR, "DEFAULT MISS action is only" - " supported in root table."); - goto err; - } acts->rule_acts[dr_pos].action = priv->hw_def_miss; break; case RTE_FLOW_ACTION_TYPE_NAT64: -- 2.39.5