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From: Bing Zhao <bingz@nvidia.com>
To: <viacheslavo@nvidia.com>, <dev@dpdk.org>, <rasland@nvidia.com>
Cc: <orika@nvidia.com>, <dsosnowski@nvidia.com>,
	<suanmingm@nvidia.com>, <matan@nvidia.com>, <thomas@monjalon.net>,
	<stable@dpdk.org>, <valex@nvidia.com>
Subject: [PATCH 1/2] net/mlx5/hws: mlx5dr, fix the tag items handling
Date: Mon, 17 Nov 2025 06:13:52 +0200	[thread overview]
Message-ID: <20251117041352.8136-1-bingz@nvidia.com> (raw)

The structure definitions of "rte_flow_item_tag" and internal
"mlx5_rte_flow_item_tag" are different. The handling of them should
be split even in one function.

It will check the type and then convert to the proper structure.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Cc: valex@nvidia.com
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 32 ++++++++++++++++++---------
 1 file changed, 22 insertions(+), 10 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index afa70bf793..010952eb20 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -213,6 +213,7 @@ struct mlx5dr_definer_conv_data {
 	X(SET,		mpls_udp_port,		UDP_PORT_MPLS,		rte_flow_item_mpls) \
 	X(SET,		source_qp,		v->queue,		mlx5_rte_flow_item_sq) \
 	X(SET,		tag,			v->data,		rte_flow_item_tag) \
+	X(SET,		mlx5_tag,		v->data,		mlx5_rte_flow_item_tag) \
 	X(SET,		metadata,		v->data,		rte_flow_item_meta) \
 	X(SET_BE16,	geneve_protocol,	v->protocol,		rte_flow_item_geneve) \
 	X(SET,		geneve_udp_port,	UDP_GENEVE_PORT,	rte_flow_item_geneve) \
@@ -1796,22 +1797,26 @@ mlx5dr_definer_conv_item_tag(struct mlx5dr_definer_conv_data *cd,
 			     struct rte_flow_item *item,
 			     int item_idx)
 {
-	const struct rte_flow_item_tag *m = item->mask;
-	const struct rte_flow_item_tag *v = item->spec;
-	const struct rte_flow_item_tag *l = item->last;
+	const struct rte_flow_item_tag *ev;
+	const struct rte_flow_item_tag *el;
+	const struct mlx5_rte_flow_item_tag *iv;
+	const struct mlx5_rte_flow_item_tag *il;
 	struct mlx5dr_definer_fc *fc;
 	int reg;
 
-	if (!m || !v)
+	if (!item->mask || !item->spec)
 		return 0;
 
-	if (item->type == RTE_FLOW_ITEM_TYPE_TAG)
+	if (item->type == RTE_FLOW_ITEM_TYPE_TAG) {
+		ev = item->spec;
 		reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
 						  RTE_FLOW_ITEM_TYPE_TAG,
 						  cd->table_type,
-						  v->index);
-	else
-		reg = (int)v->index;
+						  ev->index);
+	} else {
+		iv = item->spec;
+		reg = (int)iv->id;
+	}
 
 	if (reg <= 0) {
 		DR_LOG(ERR, "Invalid register for item tag");
@@ -1824,8 +1829,15 @@ mlx5dr_definer_conv_item_tag(struct mlx5dr_definer_conv_data *cd,
 		return rte_errno;
 
 	fc->item_idx = item_idx;
-	fc->is_range = l && l->index;
-	fc->tag_set = &mlx5dr_definer_tag_set;
+	if (item->type == RTE_FLOW_ITEM_TYPE_TAG) {
+		el = item->last;
+		fc->is_range = el && el->data;
+		c->tag_set = &mlx5dr_definer_tag_set;
+	} else {
+		il = item->last;
+		fc->is_range = il && il->data;
+		fc->tag_set = &mlx5dr_definer_mlx5_tag_set;
+	}
 
 	return 0;
 }
-- 
2.34.1


                 reply	other threads:[~2025-11-17  4:14 UTC|newest]

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