From: Itai Sharoni <isharoni@nvidia.com>
To: <dev@dpdk.org>
Cc: <thomas@monjalon.net>, <bingz@nvidia.com>,
Itai Sharoni <isharoni@nvidia.com>, <stable@dpdk.org>
Subject: [PATCH v2] net/mlx5/windows: fix match criteria in flow creation
Date: Mon, 17 Nov 2025 10:45:00 +0200 [thread overview]
Message-ID: <20251117084500.1276-1-isharoni@nvidia.com> (raw)
In-Reply-To: <11095513.IZOipudI63@thomas>
Currently the Windows implementation hardcodes match criteria to
MLX5_MATCH_OUTER_HEADERS when creating flow rules, which prevents
matching on inner headers and other criteria types like NVGRE.
The fix uses the matcher's match_criteria_enable attribute instead
of hardcoding OUTER_HEADERS, and moves the assignment outside the
action switch block to apply to all cases.
NVGRE item type is also added to the supported items list.
Fixes: 1d194496b9d1 ("net/mlx5: create flow rule on Windows")
Cc: stable@dpdk.org
Signed-off-by: Itai Sharoni <isharoni@nvidia.com>
Acked-by: Bing Zhao <bingz@nvidia.com>
---
v2:
- Added documentation for NVGRE tunnel support on Windows
- Noted requirement for DevX dynamic insertion mode
.mailmap | 1 +
doc/guides/nics/mlx5.rst | 4 ++++
drivers/net/mlx5/windows/mlx5_flow_os.c | 4 ++--
drivers/net/mlx5/windows/mlx5_flow_os.h | 1 +
4 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/.mailmap b/.mailmap
index 50a59a596a..83c2ea91a4 100644
--- a/.mailmap
+++ b/.mailmap
@@ -639,6 +639,7 @@ Intiyaz Basha <intiyaz.basha@caviumnetworks.com>
Ioana Ciornei <ioana.ciornei@nxp.com>
Isaac Boukris <iboukris@gmail.com>
Itamar Gozlan <igozlan@nvidia.com>
+Itai Sharoni <isharoni@nvidia.com>
Itsuro Oda <oda@valinux.co.jp>
Ivan Boule <ivan.boule@6wind.com>
Ivan Dyukov <i.dyukov@samsung.com>
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index e0ec3e4f6f..9efd4726df 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -1233,6 +1233,10 @@ On Windows, the features are limited:
- IPv4/TCP with CVLAN filtering
- L4 steering rules for port RSS of IP, UDP, TCP
+- Tunnel protocol support:
+
+ - NVGRE (requires DevX dynamic insertion mode)
+
.. _mlx5_multiproc:
diff --git a/drivers/net/mlx5/windows/mlx5_flow_os.c b/drivers/net/mlx5/windows/mlx5_flow_os.c
index 7a625fb880..15c6fc5613 100644
--- a/drivers/net/mlx5/windows/mlx5_flow_os.c
+++ b/drivers/net/mlx5/windows/mlx5_flow_os.c
@@ -219,9 +219,9 @@ mlx5_flow_os_create_flow(void *matcher, void *match_value,
default:
break;
}
- MLX5_SET(devx_fs_rule_add_in, in, match_criteria_enable,
- MLX5_MATCH_OUTER_HEADERS);
}
+ MLX5_SET(devx_fs_rule_add_in, in, match_criteria_enable,
+ mlx5_matcher->attr.match_criteria_enable);
*flow = mlx5_glue->devx_fs_rule_add(mlx5_matcher->ctx, in, sizeof(in));
return (*flow) ? 0 : -1;
}
diff --git a/drivers/net/mlx5/windows/mlx5_flow_os.h b/drivers/net/mlx5/windows/mlx5_flow_os.h
index 2cd4e95325..c087bca4be 100644
--- a/drivers/net/mlx5/windows/mlx5_flow_os.h
+++ b/drivers/net/mlx5/windows/mlx5_flow_os.h
@@ -47,6 +47,7 @@ mlx5_flow_os_item_supported(int item)
case RTE_FLOW_ITEM_TYPE_IPV6:
case RTE_FLOW_ITEM_TYPE_VLAN:
case RTE_FLOW_ITEM_TYPE_ESP:
+ case RTE_FLOW_ITEM_TYPE_NVGRE:
return true;
default:
return false;
--
2.28.0.windows.1
next prev parent reply other threads:[~2025-11-17 8:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-13 12:26 [PATCH] " Itai Sharoni
2025-11-13 22:37 ` Thomas Monjalon
2025-11-17 8:45 ` Itai Sharoni [this message]
2025-11-17 9:10 ` Itai Sharoni
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