From: Dariusz Sosnowski <dsosnowski@nvidia.com>
To: Bing Zhao <bingz@nvidia.com>
Cc: <viacheslavo@nvidia.com>, <dev@dpdk.org>, <rasland@nvidia.com>,
<orika@nvidia.com>, <suanmingm@nvidia.com>, <matan@nvidia.com>,
<thomas@monjalon.net>, <mkashani@nvidia.com>
Subject: Re: [PATCH] net/mlx5: move auxiliary data inline
Date: Mon, 17 Nov 2025 11:07:49 +0100 [thread overview]
Message-ID: <20251117100749.sti5c7gkuzhsrnlb@ds-vm-debian.local> (raw)
In-Reply-To: <20251117072752.9290-1-bingz@nvidia.com>
On Mon, Nov 17, 2025 at 09:27:52AM +0200, Bing Zhao wrote:
> Since auxiliary structure is associated with per rule, it can be
> allocated in the same ipool allocation to save the extra overhead
> of the *alloc header and the unneeded CPU cycles.
>
> Fixes: 27d171b88031 ("net/mlx5: abstract flow action and enable reconfigure")
> Cc: mkashani@nvidia.com
>
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Best regards,
Dariusz Sosnowski
prev parent reply other threads:[~2025-11-17 10:08 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-17 7:27 Bing Zhao
2025-11-17 10:07 ` Dariusz Sosnowski [this message]
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