[PATCH] net/mlx5: fix flex item header length field adjusting

[PATCH] net/mlx5: fix flex item header length field adjusting

[Viacheslav Ovsiienko]

There is the updated firmware providing the new capability
bit "header_length_field_offset_mode". If this bit is set
the length field offset in flex parser configuration should
not be adjusted by the supported field mask left margin,
and the bit "header_length_field_offset_mode" should be set
in configuration command on the flex parser creation
firmware call.

Fixes: b04b06f4cb3f ("net/mlx5: fix flex item header length field translation")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/common/mlx5/mlx5_devx_cmds.c |  4 ++++
 drivers/common/mlx5/mlx5_devx_cmds.h |  2 ++
 drivers/common/mlx5/mlx5_prm.h       |  8 ++++++--
 drivers/net/mlx5/mlx5.c              | 12 +++++++++---
 drivers/net/mlx5/mlx5_flow_flex.c    |  3 ++-
 5 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index 22f6b29089..d12ebf8487 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -784,6 +784,8 @@ mlx5_devx_cmd_create_flex_parser(void *ctx,
 		 MLX5_GENERAL_OBJ_TYPE_FLEX_PARSE_GRAPH);
 	MLX5_SET(parse_graph_flex, flex, header_length_mode,
 		 data->header_length_mode);
+	MLX5_SET(parse_graph_flex, flex, header_length_field_offset_mode,
+		 data->header_length_field_offset_mode);
 	MLX5_SET64(parse_graph_flex, flex, modify_field_select,
 		   data->modify_field_select);
 	MLX5_SET(parse_graph_flex, flex, header_length_base_value,
@@ -911,6 +913,8 @@ mlx5_devx_cmd_query_hca_parse_graph_node_cap
 						max_next_header_offset);
 	attr->header_length_mask_width = MLX5_GET(parse_graph_node_cap, hcattr,
 						  header_length_mask_width);
+	attr->header_length_field_mode_wa = !MLX5_GET(parse_graph_node_cap, hcattr,
+						      header_length_field_offset_mode);
 	/* Get the max supported samples from HCA CAP 2 */
 	hcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,
 			MLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE_2 |
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index 4c7747cbec..da50fc686c 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -119,6 +119,7 @@ struct mlx5_hca_flex_attr {
 	uint8_t  sample_tunnel_inner2:1;
 	uint8_t  zero_size_supported:1;
 	uint8_t  sample_id_in_out:1;
+	uint8_t  header_length_field_mode_wa:1;
 	uint16_t max_base_header_length;
 	uint8_t  max_sample_base_offset;
 	uint16_t max_next_header_offset;
@@ -654,6 +655,7 @@ struct mlx5_devx_graph_node_attr {
 	uint32_t header_length_base_value:16;
 	uint32_t header_length_field_shift:4;
 	uint32_t header_length_field_offset:16;
+	uint32_t header_length_field_offset_mode:1;
 	uint32_t header_length_field_mask;
 	struct mlx5_devx_match_sample_attr sample[MLX5_GRAPH_NODE_SAMPLE_NUM];
 	uint32_t next_header_field_offset:16;
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 9383e09893..ba33336e58 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2119,7 +2119,9 @@ struct mlx5_ifc_parse_graph_node_cap_bits {
 	u8 max_num_arc_in[0x08];
 	u8 max_num_arc_out[0x08];
 	u8 max_num_sample[0x08];
-	u8 reserved_at_78[0x03];
+	u8 reserved_at_78[0x01];
+	u8 header_length_field_offset_mode[0x1];
+	u8 reserved_at_79[0x01];
 	u8 parse_graph_anchor[0x1];
 	u8 reserved_at_7c[0x01];
 	u8 sample_tunnel_inner2[0x1];
@@ -4991,7 +4993,9 @@ struct mlx5_ifc_parse_graph_flex_bits {
 	u8 next_header_field_offset[0x10];
 	u8 reserved_at_160[0x12];
 	u8 head_anchor_id[0x6];
-	u8 reserved_at_178[0x3];
+	u8 reserved_at_178[0x1];
+	u8 header_length_field_offset_mode[0x1];
+	u8 reserved_at_17a[0x1];
 	u8 next_header_field_size[0x5];
 	u8 header_length_field_mask[0x20];
 	u8 reserved_at_224[0x20];
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 1d07ca4293..45d1fccf65 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1080,9 +1080,15 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)
 	/* The unit is uint64_t. */
 	node.header_length_field_shift = 0x3;
 	/* Header length is the 2nd byte. */
-	node.header_length_field_offset = 0x8;
-	if (attr->header_length_mask_width < 8)
-		node.header_length_field_offset += 8 - attr->header_length_mask_width;
+	if (attr->header_length_field_mode_wa) {
+		/* Legacy firmware before ConnectX-8, we should provide offset WA. */
+		node.header_length_field_offset = 8;
+		if (attr->header_length_mask_width < 8)
+			node.header_length_field_offset += 8 - attr->header_length_mask_width;
+	} else {
+		/* The new firmware, we can specify the correct offset directly. */
+		node.header_length_field_offset = 12;
+	}
 	node.header_length_field_mask = 0xF;
 	/* One byte next header protocol. */
 	node.next_header_field_size = 0x8;
diff --git a/drivers/net/mlx5/mlx5_flow_flex.c b/drivers/net/mlx5/mlx5_flow_flex.c
index b1174fe0ed..d21e28f7fd 100644
--- a/drivers/net/mlx5/mlx5_flow_flex.c
+++ b/drivers/net/mlx5/mlx5_flow_flex.c
@@ -554,7 +554,7 @@ mlx5_flex_translate_length(struct mlx5_hca_flex_attr *attr,
 				 "mask and shift combination not supported (OFFSET)");
 		msb++;
 		offset += field->field_size - msb;
-		if (msb < attr->header_length_mask_width) {
+		if (attr->header_length_field_mode_wa && msb < attr->header_length_mask_width) {
 			if (attr->header_length_mask_width - msb > offset)
 				return rte_flow_error_set
 					(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, NULL,
@@ -572,6 +572,7 @@ mlx5_flex_translate_length(struct mlx5_hca_flex_attr *attr,
 		node->header_length_field_mask = mask;
 		node->header_length_field_shift = shift;
 		node->header_length_field_offset = offset;
+		node->header_length_field_offset_mode = !attr->header_length_field_mode_wa;
 		break;
 	}
 	case FIELD_MODE_BITMASK:
-- 
2.34.1