From: Gregory Etelson <getelson@nvidia.com>
To: <dev@dpdk.org>
Cc: <getelson@nvidia.com>, <mkashani@nvidia.com>,
<rasland@nvidia.com>, Dariusz Sosnowski <dsosnowski@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>
Subject: [PATCH] net/mlx5: fix metadata sharing between E-Switch and VM
Date: Sun, 23 Nov 2025 12:12:42 +0200 [thread overview]
Message-ID: <20251123101242.1090544-1-getelson@nvidia.com> (raw)
If metadata sharing between E-Switch and VM (multi GVMI sharing) is
enabled, PMD creates the default metadata copy rule from register A
to register C_1 on Tx.
This rule should be created in group 0, but due to an incorrect
condition, it was created in group 1.
It prevented propagation of metadata from an application.
This patch fixes the condition by adding the missing check for
external rules, so egress group translation applies only to
application rules.
Fixes: a78425ba3793 ("net/mlx5: support flow metadata between E-Switch and VM")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_hw.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index c41b99746f..5932b2cd96 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -5347,7 +5347,8 @@ __translate_group(struct rte_eth_dev *dev,
NULL,
"group index not supported");
*table_group = group + 1;
- } else if (mlx5_vport_tx_metadata_passing_enabled(priv->sh) && flow_attr->egress) {
+ } else if (mlx5_vport_tx_metadata_passing_enabled(priv->sh) &&
+ flow_attr->egress && external) {
/*
* If VM cross GVMI metadata Tx was enabled, PMD creates a default
* flow rule in the group 0 to copy metadata value.
--
2.51.0
reply other threads:[~2025-11-23 10:13 UTC|newest]
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