From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7F3E347091; Fri, 19 Dec 2025 18:28:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E08A040B8F; Fri, 19 Dec 2025 18:26:37 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by mails.dpdk.org (Postfix) with ESMTP id A33A940A72 for ; Fri, 19 Dec 2025 18:26:34 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1766165195; x=1797701195; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0aBJPl+Yt4yYDmaxd0LS05Vb2llACZejmyDkVkvRs04=; b=GD9QmzMyHG4M2gi7kczN+wtU8+boIRLlLJonMhJyOO/6L8cbA8YLnlPC P9g//Zs1XBqGpC3FkptnIf0g5WYzUY3I4kq5vtZ2Bz7uE4Xgehmy67IuT 7dRkcqIjbzMp4hVkTGzqlnXWFveQ3dCZpWWQ/YQNrhsw3RB58YjfIEOs4 Fuku/PFpDk/PmPAnlZq26qetVkXOLpqqqFD4eve18xf6upuj1HGKgRVpU oK0WfN34WLy/za9JX/9SCrIekB7EVBE7B3M8O4JnE8o7O8wyFFiyn0bYt j5TYShxjFlNy0O9hTdDeLH6SOmQglG+nzFHtnhdMlRvJIXARZW6Z5UksH g==; X-CSE-ConnectionGUID: +6WK6wZsRWuEaczlGlXK3Q== X-CSE-MsgGUID: +ksqbB2eRmSDsqX20okatA== X-IronPort-AV: E=McAfee;i="6800,10657,11647"; a="71759505" X-IronPort-AV: E=Sophos;i="6.21,161,1763452800"; d="scan'208";a="71759505" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2025 09:26:35 -0800 X-CSE-ConnectionGUID: MJl6K/P0SWWBSvXHTdKUFg== X-CSE-MsgGUID: 3KCUdIrmSB+XxGqfGD4paA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,161,1763452800"; d="scan'208";a="198170495" Received: from silpixa00401385.ir.intel.com ([10.20.224.226]) by orviesa010.jf.intel.com with ESMTP; 19 Dec 2025 09:26:33 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Subject: [RFC PATCH 19/27] net/intel: avoid writing the final pkt descriptor twice Date: Fri, 19 Dec 2025 17:25:36 +0000 Message-ID: <20251219172548.2660777-20-bruce.richardson@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251219172548.2660777-1-bruce.richardson@intel.com> References: <20251219172548.2660777-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In the scalar datapath, there is a loop to handle multi-segment, and multi-descriptor packets on Tx. After that loop, the end-of-packet bit was written to the descriptor separately, meaning that for each single-descriptor packet there were two writes to the second quad-word - basically 3 x 64-bit writes rather than just 2. Adjusting the code to compute the EOP bit inside the loop saves that extra write per packet and so improves performance. Signed-off-by: Bruce Richardson --- drivers/net/intel/common/tx_scalar_fns.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/intel/common/tx_scalar_fns.h b/drivers/net/intel/common/tx_scalar_fns.h index 6079a558e4..7b643fcf44 100644 --- a/drivers/net/intel/common/tx_scalar_fns.h +++ b/drivers/net/intel/common/tx_scalar_fns.h @@ -378,6 +378,10 @@ ci_xmit_pkts(struct ci_tx_queue *txq, txn = &sw_ring[txe->next_id]; } + /* fill the last descriptor with End of Packet (EOP) bit */ + if (m_seg->next == NULL) + td_cmd |= CI_TX_DESC_CMD_EOP; + txd->buffer_addr = rte_cpu_to_le_64(buf_dma_addr); txd->cmd_type_offset_bsz = rte_cpu_to_le_64(CI_TX_DESC_DTYPE_DATA | ((uint64_t)td_cmd << CI_TXD_QW1_CMD_S) | @@ -390,21 +394,17 @@ ci_xmit_pkts(struct ci_tx_queue *txq, txe = txn; m_seg = m_seg->next; } while (m_seg); - - /* fill the last descriptor with End of Packet (EOP) bit */ - td_cmd |= CI_TX_DESC_CMD_EOP; txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used); txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used); /* set RS bit on the last descriptor of one packet */ if (txq->nb_tx_used >= txq->tx_rs_thresh) { - td_cmd |= CI_TX_DESC_CMD_RS; + txd->cmd_type_offset_bsz |= + rte_cpu_to_le_64(CI_TX_DESC_CMD_RS << CI_TXD_QW1_CMD_S); /* Update txq RS bit counters */ txq->nb_tx_used = 0; } - txd->cmd_type_offset_bsz |= - rte_cpu_to_le_64(((uint64_t)td_cmd) << CI_TXD_QW1_CMD_S); if (ts_fns != NULL) ts_id = ts_fns->write_ts_desc(txq, tx_pkt, tx_id, ts_id); -- 2.51.0