From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B4981A00BE; Fri, 1 Nov 2019 23:46:30 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 123411E886; Fri, 1 Nov 2019 23:46:30 +0100 (CET) Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) by dpdk.org (Postfix) with ESMTP id D28311E876 for ; Fri, 1 Nov 2019 23:46:27 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 0CABA20EB0; Fri, 1 Nov 2019 18:46:27 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Fri, 01 Nov 2019 18:46:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=mesmtp; bh=hcUMU/nXCa8QC9xXBYk4sgUQcchIzHrIgRqEBFR40gM=; b=OY5jn6sJcjVM YviIkuqSCIJ5X1fexjPCWhvsr3IA43OMmCSZ2sKmI2FDRClTpMpCXJ2AcRESyqf2 yfJFWhl9W8sFjWJuaMZvYnqbG1PPCCdPJ2XuUnGn3cpUBG0BXrmI1RV7ORYVRJzU HwVJXMOxYp87K6KRi6zFN5V0Ie29yko= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=hcUMU/nXCa8QC9xXBYk4sgUQcchIzHrIgRqEBFR40 gM=; b=Wkx7B4rGatfWsXHUYGotlpXZAQ/taa5VAHqKR1uD1vdapUMcLe79y2leE 8hlssjWBjnzcJIhRnMMPZX2z39czGFvPg7oMV4iK6yZwPk52fB+On/nG1GTsxqoP yu7zjnIZ/sNMuxguynWkbXy5+qeBctzTQlounG0LFtEtCRMX1/tN5kTw6leOKX8J 0+GZsMQx2SS2iLHuLPN6LM+lRaixqTcrnNtp+mqym3oOT3akF2H8t8CiwFXQHsFY 3BscGot8W6NV4Xf5RCQbgUWuOmKSlbRgUUjwzvm6KsMQlrqx9+B3CoCbsodIAFrz CWGxO3yW6g/u4aMIHZy6cxmjU9VEw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedufedruddtkedgtdduucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkfgjfhgggfgtsehtufertddttddvnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecukf hppeelfedriedrudegledruddugeenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhm rghssehmohhnjhgrlhhonhdrnhgvthenucevlhhushhtvghrufhiiigvpedt X-ME-Proxy: Received: from xps.localnet (114.149.6.93.rev.sfr.net [93.6.149.114]) by mail.messagingengine.com (Postfix) with ESMTPA id 21E74306005F; Fri, 1 Nov 2019 18:46:25 -0400 (EDT) From: Thomas Monjalon To: Haiyue Wang Cc: dev@dpdk.org, arybchenko@solarflare.com, ferruh.yigit@intel.com, jerinjacobk@gmail.com, xiaolong.ye@intel.com, ray.kinsella@intel.com, chenmin.sun@intel.com, Slava Ovsiienko Date: Fri, 01 Nov 2019 23:46:23 +0100 Message-ID: <20693558.VL3dRorq05@xps> In-Reply-To: <20191031171139.105110-3-haiyue.wang@intel.com> References: <20191031171139.105110-1-haiyue.wang@intel.com> <20191031171139.105110-3-haiyue.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v1 3/3] ethdev: enhance the API for getting burst mode information X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Thank you for trying to address comments done late. 31/10/2019 18:11, Haiyue Wang: > --- a/lib/librte_ethdev/rte_ethdev.h > +++ b/lib/librte_ethdev/rte_ethdev.h > -enum rte_eth_burst_mode_option { > - RTE_ETH_BURST_SCALAR = (1 << 0), > - RTE_ETH_BURST_VECTOR = (1 << 1), > - > - /**< bits[15:2] are reserved for each vector type */ > - RTE_ETH_BURST_ALTIVEC = (1 << 2), > - RTE_ETH_BURST_NEON = (1 << 3), > - RTE_ETH_BURST_SSE = (1 << 4), > - RTE_ETH_BURST_AVX2 = (1 << 5), > - RTE_ETH_BURST_AVX512 = (1 << 6), > - > - RTE_ETH_BURST_SCATTERED = (1 << 16), /**< Support scattered packets */ > - RTE_ETH_BURST_BULK_ALLOC = (1 << 17), /**< Support mbuf bulk alloc */ > - RTE_ETH_BURST_SIMPLE = (1 << 18), > - > - RTE_ETH_BURST_PER_QUEUE = (1 << 19), /**< Support per queue burst */ > -}; > +#define RTE_ETH_BURST_SCALAR (1ULL << 0) > +#define RTE_ETH_BURST_VECTOR (1ULL << 1) Only one bit is needed: if it is not vector, it is scalar. I think you can remove the scalar bit. > +/**< bits[15:2] are reserved for each vector type */ Why 15:2 instead of 2:15? > +#define RTE_ETH_BURST_ALTIVEC (1ULL << 2) > +#define RTE_ETH_BURST_NEON (1ULL << 3) > +#define RTE_ETH_BURST_SSE (1ULL << 4) > +#define RTE_ETH_BURST_AVX2 (1ULL << 5) > +#define RTE_ETH_BURST_AVX512 (1ULL << 6) Of course, I still believe that giving a special treatment to vector instructions is wrong. You did not justify why it needs to be defined in bits instead of string. I am not asking again because anyway you don't really reply. I think you are executing an order you received and I don't want to blame you more. I suspect a real hidden issue in Intel CPUs that you try to mitigate. No need to reply to this comment. Anyway I will propose to replace this API in the next release. > +/**< Support per queue burst */ > +#define RTE_ETH_BURST_PER_QUEUE (1ULL << 63) This comment is meaningless. If this bit has a usage, please explain how to use this bit in the comment.