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From: Thomas Monjalon <thomas@monjalon.net>
To: "Min Hu (Connor)" <humin29@huawei.com>
Cc: dev@dpdk.org, ferruh.yigit@intel.com, rsanford@akamai.com,
	erik.g.carrillo@intel.com, bruce.richardson@intel.com
Subject: Re: [dpdk-dev] [PATCH] examples/timer: fix incorrect time interval
Date: Wed, 21 Apr 2021 20:34:11 +0200	[thread overview]
Message-ID: <2073087.ahSVXVslbx@thomas> (raw)
In-Reply-To: <1618470748-12369-1-git-send-email-humin29@huawei.com>

15/04/2021 09:12, Min Hu (Connor):
> From: Chengchang Tang <tangchengchang@huawei.com>
> 
> Timer sample example assumes that the frequency of the timer is about
> 2Ghz to control the period of calling rte_timer_manage(). But this
> assumption is easy to fail. For example. the frequency of tsc on ARM64
> is much less than 2Ghz.

So rte_timer_manage() will be called less often, yes.

> This patch uses the frequency of the current timer to calculate the
> correct time interval to ensure consistent result on all platforms.

I am not sure about making the example more complex.
What is the issue with the previous value?




  reply	other threads:[~2021-04-21 18:34 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-15  7:12 Min Hu (Connor)
2021-04-21 18:34 ` Thomas Monjalon [this message]
2021-04-22  1:38   ` Chengchang Tang
2021-04-21 19:12 ` Carrillo, Erik G
2021-05-05 21:37 ` Thomas Monjalon
2021-05-06  2:06   ` Chengchang Tang
2021-05-06  8:08     ` Thomas Monjalon
2021-05-06  8:23       ` Chengchang Tang
2021-05-06  9:29 ` [dpdk-dev] [PATCH v2] " Min Hu (Connor)
2021-05-12 14:40   ` Thomas Monjalon

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