From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0D098A0547; Mon, 30 Aug 2021 18:07:32 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 82866410E8; Mon, 30 Aug 2021 18:07:31 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B6492410D8 for ; Mon, 30 Aug 2021 18:07:28 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 17UDOQ9j027772 for ; Mon, 30 Aug 2021 09:07:27 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=SyU9mtF/Owhm6QRBR4MfrzVgVgUFEPq0sfj16S5kKRk=; b=lB6uguat9jFpLnG53kBqp2e+qjRaFBjaYHgPwiO7huRrm2M71CnSo0WRiOHSo/hDaU58 cTLrLbYiJTvGmFrGV4eSZGoGIX24lEY53B/a9GEsJ/x29sWffcUUqmbFw9XK2cp2isfh dRwlYNCljcN1heKEVaCQ2+S5OCZzv8l7KHKe7Tq8rHziJl1lcZNJuacCGQFgN/ZUeY9m ZJkDTkm7C7wEZIoKDqIrMHmNpE05X1Dz+MrQLgrCOa/O7Cy0YtlXPnCvvs93YdQy+N1j DI0VT6UOwTJ3BVSIw0lN79nxIbDDfBCxlI5y2TLEUUVDUsboO5uLD8rt0HTqOAVRFPn2 Ow== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3as06f8mbm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 30 Aug 2021 09:07:27 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 30 Aug 2021 09:07:26 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 30 Aug 2021 09:07:26 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id D11B63F707C; Mon, 30 Aug 2021 09:07:24 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , "Pavan Nikhilesh" Date: Mon, 30 Aug 2021 21:36:46 +0530 Message-ID: <208cb9f2657e889a9b750dcdf4ccf2f039333899.1630339233.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <7b6c2f7a5e4b130204c7fdca92daf921631e479d.1628253156.git.sthotton@marvell.com> References: <7b6c2f7a5e4b130204c7fdca92daf921631e479d.1628253156.git.sthotton@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 3s4Pla1EovHIaCqwuaMgKoU3zNBVMySL X-Proofpoint-ORIG-GUID: 3s4Pla1EovHIaCqwuaMgKoU3zNBVMySL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-08-30_05,2021-08-30_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH v2] event/cnxk: fix SSO and TIM argument parsing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Type of kvargs value and handler function argument should match to avoid spilling memory. Fixes: 7ffa7379965e ("event/cnxk: add option to configure getwork mode") Signed-off-by: Shijith Thotton --- v2: * Rebased. drivers/event/cnxk/cnxk_eventdev.c | 6 +++--- drivers/event/cnxk/cnxk_tim_evdev.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c index cfd7fb971c..be682bb0df 100644 --- a/drivers/event/cnxk/cnxk_eventdev.c +++ b/drivers/event/cnxk/cnxk_eventdev.c @@ -571,11 +571,11 @@ cnxk_sso_parse_devargs(struct cnxk_sso_evdev *dev, struct rte_devargs *devargs) &dev->xae_cnt); rte_kvargs_process(kvlist, CNXK_SSO_GGRP_QOS, &parse_sso_kvargs_dict, dev); - rte_kvargs_process(kvlist, CNXK_SSO_FORCE_BP, &parse_kvargs_value, + rte_kvargs_process(kvlist, CNXK_SSO_FORCE_BP, &parse_kvargs_flag, &dev->force_ena_bp); - rte_kvargs_process(kvlist, CN9K_SSO_SINGLE_WS, &parse_kvargs_value, + rte_kvargs_process(kvlist, CN9K_SSO_SINGLE_WS, &parse_kvargs_flag, &single_ws); - rte_kvargs_process(kvlist, CN10K_SSO_GW_MODE, &parse_kvargs_value, + rte_kvargs_process(kvlist, CN10K_SSO_GW_MODE, &parse_kvargs_flag, &dev->gw_mode); dev->dual_ws = !single_ws; rte_kvargs_free(kvlist); diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h index c369f6f472..8e25cef0c4 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.h +++ b/drivers/event/cnxk/cnxk_tim_evdev.h @@ -90,8 +90,8 @@ struct cnxk_tim_evdev { uint32_t chunk_sz; /* Dev args */ uint8_t disable_npa; - uint16_t chunk_slots; - uint16_t min_ring_cnt; + uint32_t chunk_slots; + uint32_t min_ring_cnt; uint8_t enable_stats; uint16_t ring_ctl_cnt; struct cnxk_tim_ctl *ring_ctl_data; -- 2.25.1