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Sat, 12 Feb 2022 09:14:43 -0500 (EST) From: Thomas Monjalon To: Ruifeng Wang , Ferruh Yigit , "pbhagavatula@marvell.com" , "jerinj@marvell.com" Cc: dev@dpdk.org, Jan Viktorin , Bruce Richardson , "dev@dpdk.org" , nd , Jerin Jacob Subject: Re: [PATCH] config/cn10k: align mempool elements to 128 bytes Date: Sat, 12 Feb 2022 15:14:42 +0100 Message-ID: <21642516.hxa6pUQ8Du@thomas> In-Reply-To: References: <20211213110615.4458-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 21/01/2022 10:37, Jerin Jacob: > On Thu, Jan 20, 2022 at 3:21 PM Jerin Jacob wrote: > > > > On Tue, Dec 14, 2021 at 2:53 PM Ruifeng Wang wrote: > > > > > > > -----Original Message----- > > > > From: pbhagavatula@marvell.com > > > > Sent: Monday, December 13, 2021 7:06 PM > > > > To: jerinj@marvell.com; Jan Viktorin ; Ruifeng > > > > Wang ; Bruce Richardson > > > > > > > > Cc: dev@dpdk.org; Pavan Nikhilesh > > > > Subject: [PATCH] config/cn10k: align mempool elements to 128 bytes > > > > > > > > From: Pavan Nikhilesh > > > > > > > > Mempool elements are by default aligned to CACHELINE_SIZE. > > > > In CN10K cacheline size is 64B but the RoC requires buffers to be aligned to > > > > 128B. > > > > Set RTE_MEMPOOL_ALIGN to 128 to force mempool buffers to be aligned > > > > 128 bytes. > > > > > > > > Signed-off-by: Pavan Nikhilesh > > > > --- > > > > config/arm/meson.build | 3 ++- > > > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/config/arm/meson.build b/config/arm/meson.build index > > > > 213324d262..33afe1a9ad 100644 > > > > --- a/config/arm/meson.build > > > > +++ b/config/arm/meson.build > > > > @@ -276,7 +276,8 @@ soc_cn10k = { > > > > 'implementer' : '0x41', > > > > 'flags': [ > > > > ['RTE_MAX_LCORE', 24], > > > > - ['RTE_MAX_NUMA_NODES', 1] > > > > + ['RTE_MAX_NUMA_NODES', 1], > > > > + ['RTE_MEMPOOL_ALIGN', 128] > > > > ], > > > > 'part_number': '0xd49', > > > > 'extra_march_features': ['crypto'], > > > > -- > > > > 2.17.1 > > > > > > Reviewed-by: Ruifeng Wang > > > > Applied to dpdk-next-net-mrvl/for-next-net. Thanks > > As per @Ferruh Yigit suggestion, This patch will be taken through the > main tree. > I changed state as New and Delegate as @Thomas Monjalon for this patch in pw. > > > > > > > Added > > Fixes: 1b4c86a721c9 ("config/arm: add Marvell CN10K") > > Cc: stable@dpdk.org Applied