From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B3601A053D; Fri, 17 Jul 2020 17:19:22 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6A25E1BF71; Fri, 17 Jul 2020 17:19:21 +0200 (CEST) Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id C1CCE1BF70 for ; Fri, 17 Jul 2020 17:19:19 +0200 (CEST) Received: from compute7.internal (compute7.nyi.internal [10.202.2.47]) by mailout.nyi.internal (Postfix) with ESMTP id 591115C00BA; Fri, 17 Jul 2020 11:19:19 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute7.internal (MEProxy); Fri, 17 Jul 2020 11:19:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= tbNP2f43hxoS67jobaFr/Np2peqjhTWXVNFXLaQU+G0=; b=sXymz+uPcNGy6suz 3Qil8mS4HjaW+WJi7WGOHvY/LsW8uuxmJ9KDlUFwOQD8RWUATl2bNxOG5XpsIGyd gyFJHIZEV6s2oMDbSgFIQbgpXQI1MLulocz5mQavpSrpxsU47Qa2b75YbptNIdG/ J0MjB5+xbanlPhpMI7gfr6ukUhhV9FhPXXsHtAo/w4vy4PDVkYdLC0XMd7Pacg5M n8kNLBmS5DN6WfCwuXdSHhE7pvoCoDDXTaOJHzxdLUmgofWuEsmxL6o8TauIwS6+ Heuq5yuOzkvnFm3r9guusnxZ1PpsgLopNysM71Euve6DX6Rw2fmpXkjbWBdiJLJa ZbOxDg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=tbNP2f43hxoS67jobaFr/Np2peqjhTWXVNFXLaQU+ G0=; b=EBtB/JCmAdcp1lKA1ehngsq9e6LkLXNiKrRW/ZtKehEoNgDnwE574ZNPN /0ydMCOrPaNTNZDGaK6e8/s65sJzes2mMq7m7zozvcvWaddFC8klG1P32dACm2dm vm/iWrTrip3Gx3FsFbTVuFx0NDHWlAIv4hHUJr8v3iQnp0YEQYvzwdnDSZ4L8uHw H1BQNPBaC/OMsGYsBLMyzx6FNRqLzyuMScXF/A9/FDXcLwUUctT37o0l7SkyyNKT DNCe5CV07CfQFbqWmh0AxQYQzQxYLSbtEgA1pP7K3HbCYZFPcw/790gk0A7VJiYa 6oOvrxJAy/HGgewij66bGj1JUYhBg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduiedrfeeigdekhecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpedugefgvdefudfftdefgeelgffhueekgfffhfeujedtteeutdejueei iedvffegheenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrhfuih iivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgrlhho nhdrnhgvth X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id 58BFD306005F; Fri, 17 Jul 2020 11:19:18 -0400 (EDT) From: Thomas Monjalon To: Slava Ovsiienko Cc: "dev@dpdk.org" , Matan Azrad , Raslan Darawsheh Date: Fri, 17 Jul 2020 17:19:17 +0200 Message-ID: <24924170.TV8gEDprjA@thomas> In-Reply-To: References: <1591771085-24959-1-git-send-email-viacheslavo@mellanox.com> <2065696.4d1Aeg7Mo6@thomas> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH 3/3] common/mlx5: fix DevX register access opcode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 17/07/2020 17:11, Slava Ovsiienko: > From: Thomas Monjalon > > 17/07/2020 16:28, Viacheslav Ovsiienko: > > > The dedicated MLX5_CMD_OP_ACCESS_REGISTER_USER opcode must be > > used to > > > read hardware register content from unprotected mode. > > > > Otherwise? What was broken? > > Otherwise the MLX5_CMD_OP_ACCESS_REGISTER was used, it returned EINVAL > and register value was not read. It was supposed to enable ACCESS_REGISTER > operation from user mode in kernel driver to read registers, but eventually > it was replaced with ACCESS_REGISTER_USER dedicated operation. > > mlx5 PMD does not rely on this feature strongly, if register reading fails > it deduces the timestamp mode from reported timestamp counter > frequency. OK I think some of these explanations deserve to be in the commit log.