From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5CAEDA0032; Wed, 29 Sep 2021 23:32:04 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CBB8C410EB; Wed, 29 Sep 2021 23:32:03 +0200 (CEST) Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) by mails.dpdk.org (Postfix) with ESMTP id C4878410E5; Wed, 29 Sep 2021 23:32:01 +0200 (CEST) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 5B3E25C00CF; Wed, 29 Sep 2021 17:32:01 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Wed, 29 Sep 2021 17:32:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm2; bh= Q3ESBBn/ZwTai4gjnZA9gSPtdJk58uQi6MchisXmVAg=; b=aPUu7thmn0ZlsNW5 CYZ1lDUKLLz4gWI9TErS8YUp2+GxNS4sdt4mQzdQNQYVvcaf2n3bkTkKdfeXNRmE uJ4fEWaKD9fV31Kq0dwDQpyiGb2fPOs5uI1rDmHbJLIu8V5G0DipkuYMwzZi4b6H hfrkcsFgqeykY4lS3pdsQgvmHhQbVHbzlRG4yO8JZNjPSSnRmgyr2qDpIsIDHkn9 NJXgxuGTZElwvDZeBLoMeFsQ6p6//zAr/hRwRQJn8Iw1SBS0i47FOB5Vpe3vOkNb 6/hMOIP0ZlM6w5H1MSYIGs3yrQtWPKDzkdoDqGPk6SxcTikuEA3BKpiNXz/9F03v NSPLfw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=Q3ESBBn/ZwTai4gjnZA9gSPtdJk58uQi6MchisXmV Ag=; b=YwZVPjsljXz6NOjSYeyGVYpz2p6l+0GrK/qpltfoB07vNss4k4VRE8ckh oYA+xbPLlBZmcWsNDUpfzkxl8scEr1Aeb8lDHkuZ3qi6B3lYo1dK8YwfAt1SzMlr 01TrXCwNipCCfO95Sk16EWTVB/rZ4az7bZB7BzpAOFBkjxFGZAz66AZdZKMhrxso 0hWyF3LD2bhTIzbPhQBI9FrFvbu5511yG9Fq/8Wuq0Wlpr7liySo48uNm56xbIcd 4Gl0vSD1LN3D86/nWjf5wg4hxuPUc5lXeJ0vRZHswOZkZcSxBJSprrSAwqIUQ8Zn BMDjxqZBFWerdWCevUcCc1dSTUw/A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrudekvddgudehlecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhm rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc ggtffrrghtthgvrhhnpedugefgvdefudfftdefgeelgffhueekgfffhfeujedtteeutdej ueeiiedvffegheenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfh hrohhmpehthhhomhgrshesmhhonhhjrghlohhnrdhnvght X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 29 Sep 2021 17:32:00 -0400 (EDT) From: Thomas Monjalon To: Bing Zhao Cc: viacheslavo@nvidia.com, matan@nvidia.com, dev@dpdk.org, rasland@nvidia.com, stable@dpdk.org, akozyrev@nvidia.com Date: Wed, 29 Sep 2021 23:31:57 +0200 Message-ID: <2545808.iCvCU3XZGg@thomas> In-Reply-To: <20210927080203.23877-1-bingz@nvidia.com> References: <20210927080203.23877-1-bingz@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix Tx metadata endianness in data path X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 27/09/2021 10:02, Bing Zhao: > The metadata can be set in the mbuf dynamic field and then used in > flow rules steering for egress direction. The hardware requires > network order for both the insertion of a rule and sending a packet. > Indeed, there is no strict restriction for the endianness. The order > for sending a packet and its steering rule should be consistent. > > In the past, there was no endianness conversion due to the > performance reason. The flow rule converted the metadata into little > endian for hardware (if needed) and the packet hit the flow rule also > with little endian. > > After the metadata was converted to big endian, the missing adaption > in the data path resulted in a flow miss of the egress packets. > > Converting the metadata to big endian before posting a WQE to the > hardware solves this issue. > > Fixes: b57e414b48c0 ("net/mlx5: convert meta register to big-endian") > Cc: akozyrev@nvidia.com > Cc: stable@dpdk.org > > Signed-off-by: Bing Zhao > Acked-by: Viacheslav Ovsiienko Applied in next-net-mlx, thanks.