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From: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
To: Stephen Hemminger <stephen@networkplumber.org>
CC: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
 "paulmck@linux.ibm.com" <paulmck@linux.ibm.com>, "Kovacevic, Marko"
 <marko.kovacevic@intel.com>, "dev@dpdk.org" <dev@dpdk.org>, "Gavin Hu (Arm
 Technology China)" <Gavin.Hu@arm.com>, Dharmik Thakkar
 <Dharmik.Thakkar@arm.com>, Malvika Gupta <Malvika.Gupta@arm.com>, nd
 <nd@arm.com>
Thread-Topic: [PATCH v5 1/3] rcu: add RCU library supporting QSBR mechanism
Thread-Index: AQHU8W09YQlYNBQMIUeythDpmiY2L6Y5BHAAgAAFAYCAAAupgIAEE9RggAAmBQCAACqAYA==
Date: Mon, 15 Apr 2019 17:39:07 +0000
Message-ID: <2601191342CEEE43887BDE71AB9772580148A98064@irsmsx105.ger.corp.intel.com>
References: <20181122033055.3431-1-honnappa.nagarahalli@arm.com>
 <20190412202039.46902-1-honnappa.nagarahalli@arm.com>
 <20190412202039.46902-2-honnappa.nagarahalli@arm.com>
 <20190412150650.3709358e@shemminger-XPS-13-9360>
 <VE1PR08MB51497C4B9E164CD07AC6EB5298280@VE1PR08MB5149.eurprd08.prod.outlook.com>
 <20190412160629.670eacd1@shemminger-XPS-13-9360>
 <2601191342CEEE43887BDE71AB9772580148A97E53@irsmsx105.ger.corp.intel.com>
 <20190415083834.31b38ed3@shemminger-XPS-13-9360>
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Subject: Re: [dpdk-dev] [PATCH v5 1/3] rcu: add RCU library supporting QSBR
	mechanism
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> -----Original Message-----
> From: Stephen Hemminger [mailto:stephen@networkplumber.org]
> Sent: Monday, April 15, 2019 4:39 PM
> To: Ananyev, Konstantin <konstantin.ananyev@intel.com>
> Cc: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>; paulmck@linux.ib=
m.com; Kovacevic, Marko
> <marko.kovacevic@intel.com>; dev@dpdk.org; Gavin Hu (Arm Technology China=
) <Gavin.Hu@arm.com>; Dharmik Thakkar
> <Dharmik.Thakkar@arm.com>; Malvika Gupta <Malvika.Gupta@arm.com>; nd <nd@=
arm.com>
> Subject: Re: [PATCH v5 1/3] rcu: add RCU library supporting QSBR mechanis=
m
>=20
> On Mon, 15 Apr 2019 12:24:47 +0000
> "Ananyev, Konstantin" <konstantin.ananyev@intel.com> wrote:
>=20
> > > -----Original Message-----
> > > From: Stephen Hemminger [mailto:stephen@networkplumber.org]
> > > Sent: Saturday, April 13, 2019 12:06 AM
> > > To: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> > > Cc: Ananyev, Konstantin <konstantin.ananyev@intel.com>; paulmck@linux=
.ibm.com; Kovacevic, Marko <marko.kovacevic@intel.com>;
> > > dev@dpdk.org; Gavin Hu (Arm Technology China) <Gavin.Hu@arm.com>; Dha=
rmik Thakkar <Dharmik.Thakkar@arm.com>; Malvika
> Gupta
> > > <Malvika.Gupta@arm.com>; nd <nd@arm.com>
> > > Subject: Re: [PATCH v5 1/3] rcu: add RCU library supporting QSBR mech=
anism
> > >
> > > On Fri, 12 Apr 2019 22:24:45 +0000
> > > Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> wrote:
> > >
> > > > >
> > > > > On Fri, 12 Apr 2019 15:20:37 -0500
> > > > > Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> wrote:
> > > > >
> > > > > > Add RCU library supporting quiescent state based memory reclama=
tion
> > > > > method.
> > > > > > This library helps identify the quiescent state of the reader t=
hreads
> > > > > > so that the writers can free the memory associated with the loc=
k less
> > > > > > data structures.
> > > > > >
> > > > > > Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.c=
om>
> > > > > > Reviewed-by: Steve Capper <steve.capper@arm.com>
> > > > > > Reviewed-by: Gavin Hu <gavin.hu@arm.com>
> > > > > > Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
> > > > > > Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> > > > >
> > > > > After evaluating long term API/ABI issues, I think you need to ge=
t rid of almost
> > > > > all use of inline and visible structures. Yes it might be margina=
lly slower, but
> > > > > you thank me the first time you have to fix something.
> > > > >
> > > > Agree, I was planning on another version to address this (I am yet =
to take a look at your patch addressing the ABI).
> > > > The structure visibility definitely needs to be addressed.
> > > > For the inline functions, is the plan to convert all the inline fun=
ctions in DPDK? If yes, I think we need to consider the performance
> > > difference. May be consider L3-fwd application, change all the inline=
 functions in its path and run a test?
> > >
> > > Every function that is not in the direct datapath should not be inlin=
e.
> > > Exceptions or things like rx/tx burst, ring enqueue/dequeue, and pack=
et alloc/free
> >
> > Plus synchronization routines: spin/rwlock/barrier, etc.
> > I think rcu should be one of such exceptions - it is just another synch=
ronization mechanism after all
> > (just a bit more sophisticated).
> > Konstantin
>=20
> If you look at the other userspace RCU, you wil see that the only inlines
> are the rcu_read_lock,rcu_read_unlock and rcu_reference/rcu_assign_pointe=
r.
>=20
> The synchronization logic is all real functions.

In fact, I think urcu provides both flavors:
https://github.com/urcu/userspace-rcu/blob/master/include/urcu/static/urcu-=
qsbr.h
I still don't understand why we have to treat it differently then let say s=
pin-lock/ticket-lock or rwlock.
If we gone all the way to create our own version of rcu, we probably want i=
t to be as fast as possible
(I know that main speedup should come from the fact that readers don't have=
 to wait for writer to finish, but still...)

Konstantin

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From: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
To: Stephen Hemminger <stephen@networkplumber.org>
CC: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
 "paulmck@linux.ibm.com" <paulmck@linux.ibm.com>, "Kovacevic, Marko"
 <marko.kovacevic@intel.com>, "dev@dpdk.org" <dev@dpdk.org>, "Gavin Hu (Arm
 Technology China)" <Gavin.Hu@arm.com>, Dharmik Thakkar
 <Dharmik.Thakkar@arm.com>, Malvika Gupta <Malvika.Gupta@arm.com>, nd
 <nd@arm.com>
Thread-Topic: [PATCH v5 1/3] rcu: add RCU library supporting QSBR mechanism
Thread-Index: AQHU8W09YQlYNBQMIUeythDpmiY2L6Y5BHAAgAAFAYCAAAupgIAEE9RggAAmBQCAACqAYA==
Date: Mon, 15 Apr 2019 17:39:07 +0000
Message-ID:
 <2601191342CEEE43887BDE71AB9772580148A98064@irsmsx105.ger.corp.intel.com>
References: <20181122033055.3431-1-honnappa.nagarahalli@arm.com>
 <20190412202039.46902-1-honnappa.nagarahalli@arm.com>
 <20190412202039.46902-2-honnappa.nagarahalli@arm.com>
 <20190412150650.3709358e@shemminger-XPS-13-9360>
 <VE1PR08MB51497C4B9E164CD07AC6EB5298280@VE1PR08MB5149.eurprd08.prod.outlook.com>
 <20190412160629.670eacd1@shemminger-XPS-13-9360>
 <2601191342CEEE43887BDE71AB9772580148A97E53@irsmsx105.ger.corp.intel.com>
 <20190415083834.31b38ed3@shemminger-XPS-13-9360>
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> -----Original Message-----
> From: Stephen Hemminger [mailto:stephen@networkplumber.org]
> Sent: Monday, April 15, 2019 4:39 PM
> To: Ananyev, Konstantin <konstantin.ananyev@intel.com>
> Cc: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>; paulmck@linux.ib=
m.com; Kovacevic, Marko
> <marko.kovacevic@intel.com>; dev@dpdk.org; Gavin Hu (Arm Technology China=
) <Gavin.Hu@arm.com>; Dharmik Thakkar
> <Dharmik.Thakkar@arm.com>; Malvika Gupta <Malvika.Gupta@arm.com>; nd <nd@=
arm.com>
> Subject: Re: [PATCH v5 1/3] rcu: add RCU library supporting QSBR mechanis=
m
>=20
> On Mon, 15 Apr 2019 12:24:47 +0000
> "Ananyev, Konstantin" <konstantin.ananyev@intel.com> wrote:
>=20
> > > -----Original Message-----
> > > From: Stephen Hemminger [mailto:stephen@networkplumber.org]
> > > Sent: Saturday, April 13, 2019 12:06 AM
> > > To: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> > > Cc: Ananyev, Konstantin <konstantin.ananyev@intel.com>; paulmck@linux=
.ibm.com; Kovacevic, Marko <marko.kovacevic@intel.com>;
> > > dev@dpdk.org; Gavin Hu (Arm Technology China) <Gavin.Hu@arm.com>; Dha=
rmik Thakkar <Dharmik.Thakkar@arm.com>; Malvika
> Gupta
> > > <Malvika.Gupta@arm.com>; nd <nd@arm.com>
> > > Subject: Re: [PATCH v5 1/3] rcu: add RCU library supporting QSBR mech=
anism
> > >
> > > On Fri, 12 Apr 2019 22:24:45 +0000
> > > Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> wrote:
> > >
> > > > >
> > > > > On Fri, 12 Apr 2019 15:20:37 -0500
> > > > > Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> wrote:
> > > > >
> > > > > > Add RCU library supporting quiescent state based memory reclama=
tion
> > > > > method.
> > > > > > This library helps identify the quiescent state of the reader t=
hreads
> > > > > > so that the writers can free the memory associated with the loc=
k less
> > > > > > data structures.
> > > > > >
> > > > > > Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.c=
om>
> > > > > > Reviewed-by: Steve Capper <steve.capper@arm.com>
> > > > > > Reviewed-by: Gavin Hu <gavin.hu@arm.com>
> > > > > > Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
> > > > > > Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> > > > >
> > > > > After evaluating long term API/ABI issues, I think you need to ge=
t rid of almost
> > > > > all use of inline and visible structures. Yes it might be margina=
lly slower, but
> > > > > you thank me the first time you have to fix something.
> > > > >
> > > > Agree, I was planning on another version to address this (I am yet =
to take a look at your patch addressing the ABI).
> > > > The structure visibility definitely needs to be addressed.
> > > > For the inline functions, is the plan to convert all the inline fun=
ctions in DPDK? If yes, I think we need to consider the performance
> > > difference. May be consider L3-fwd application, change all the inline=
 functions in its path and run a test?
> > >
> > > Every function that is not in the direct datapath should not be inlin=
e.
> > > Exceptions or things like rx/tx burst, ring enqueue/dequeue, and pack=
et alloc/free
> >
> > Plus synchronization routines: spin/rwlock/barrier, etc.
> > I think rcu should be one of such exceptions - it is just another synch=
ronization mechanism after all
> > (just a bit more sophisticated).
> > Konstantin
>=20
> If you look at the other userspace RCU, you wil see that the only inlines
> are the rcu_read_lock,rcu_read_unlock and rcu_reference/rcu_assign_pointe=
r.
>=20
> The synchronization logic is all real functions.

In fact, I think urcu provides both flavors:
https://github.com/urcu/userspace-rcu/blob/master/include/urcu/static/urcu-=
qsbr.h
I still don't understand why we have to treat it differently then let say s=
pin-lock/ticket-lock or rwlock.
If we gone all the way to create our own version of rcu, we probably want i=
t to be as fast as possible
(I know that main speedup should come from the fact that readers don't have=
 to wait for writer to finish, but still...)

Konstantin