From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 8108168BA for ; Wed, 19 Feb 2014 13:40:22 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 19 Feb 2014 04:41:46 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,505,1389772800"; d="scan'208";a="484016727" Received: from irsmsx104.ger.corp.intel.com ([163.33.3.159]) by fmsmga002.fm.intel.com with ESMTP; 19 Feb 2014 04:41:45 -0800 Received: from irsmsx106.ger.corp.intel.com (163.33.3.31) by IRSMSX104.ger.corp.intel.com (163.33.3.159) with Microsoft SMTP Server (TLS) id 14.3.123.3; Wed, 19 Feb 2014 12:41:03 +0000 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.202]) by IRSMSX106.ger.corp.intel.com ([169.254.8.96]) with mapi id 14.03.0123.003; Wed, 19 Feb 2014 12:41:03 +0000 From: "Ananyev, Konstantin" To: Didier Pallard , "thomas.monjalon@6wind.com" Thread-Topic: [dpdk-dev] [RFC PATCH 2/2] ixgbe: release software locked semaphores on initialization Thread-Index: AQHPLWvrdVEqJ3MYxkGBjaMO4H08mZq8g7/Q Date: Wed, 19 Feb 2014 12:41:02 +0000 Message-ID: <2601191342CEEE43887BDE71AB97725808E689E6@IRSMSX105.ger.corp.intel.com> References: <1392811162-28527-1-git-send-email-didier.pallard@6wind.com> <1392811162-28527-2-git-send-email-didier.pallard@6wind.com> In-Reply-To: <1392811162-28527-2-git-send-email-didier.pallard@6wind.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [RFC PATCH 2/2] ixgbe: release software locked semaphores on initialization X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Feb 2014 12:40:23 -0000 Hi, Can the patch be reworked to keep changes under librte_pmd_ixgbe/ixgbe dire= ctory untouched? Those files are derived directly from the BSD driver baseline, and any chan= ges will make future merges of newer code more challenging. The changes should be limited to files in the librte_pmd_ixgbe directory (a= nd ethdev). Thanks Konstantin -----Original Message----- From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Didier Pallard Sent: Wednesday, February 19, 2014 11:59 AM To: thomas.monjalon@6wind.com Subject: [dpdk-dev] [RFC PATCH 2/2] ixgbe: release software locked semaphor= es on initialization It may happen that DPDK application gets killed while having acquired locks= on the ethernet hardware, causing these locks to be never released. On nex= t restart of the application, DPDK skip those ports because it can not acqu= ire the lock, this may cause some ports (or even complete board if SMBI is = locked) to be inaccessible from DPDK application until reboot of the hardwa= re. This patch release locks that are supposed to be locked due to an improper = exit of the application. Signed-off-by: Didier Pallard --- lib/librte_pmd_ixgbe/ixgbe/ixgbe_82598.c | 30 +++++++++++++++++++++++++++ lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c | 29 ++++++++++++++++++++++++++ lib/librte_pmd_ixgbe/ixgbe/ixgbe_x540.c | 33 ++++++++++++++++++++++++++= ++++ 3 files changed, 92 insertions(+) diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82598.c b/lib/librte_pmd_ixgb= e/ixgbe/ixgbe_82598.c index a9d1b9d..8e2ca1c 100644 --- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82598.c +++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82598.c @@ -115,6 +115,7 @@ s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw) struct ixgbe_mac_info *mac =3D &hw->mac; struct ixgbe_phy_info *phy =3D &hw->phy; s32 ret_val; + u16 mask; = DEBUGFUNC("ixgbe_init_ops_82598"); = @@ -166,6 +167,35 @@ s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw) /* Manageability interface */ mac->ops.set_fw_drv_ver =3D NULL; = + /* Get bus info */ + mac->ops.get_bus_info(hw); + + /* Ensure that all locks are released before first NVM or PHY access = +*/ + + /* + * Phy lock should not fail in this early stage. If this is the case, + * it is due to an improper exit of the application. + * So force the release of the faulty lock. Release of common lock + * is done automatically by swfw_sync function. + */ + mask =3D IXGBE_GSSR_PHY0_SM << hw->bus.func; + if (hw->mac.ops.acquire_swfw_sync(hw, mask) < 0) { + DEBUGOUT1("SWFW phy%d lock released", hw->bus.func); + } + hw->mac.ops.release_swfw_sync(hw, mask); + + /* + * Those one are more tricky since they are common to all ports; but + * swfw_sync retries last long enough (1s) to be almost sure that if + * lock can not be taken it is due to an improper lock of the + * semaphore. + */ + mask =3D IXGBE_GSSR_EEP_SM | IXGBE_GSSR_MAC_CSR_SM | IXGBE_GSSR_SW_MNG_SM; + if (hw->mac.ops.acquire_swfw_sync(hw, mask) < 0) { + DEBUGOUT("SWFW common locks released"); + } + hw->mac.ops.release_swfw_sync(hw, mask); + return ret_val; } = diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c b/lib/librte_pmd_ixgb= e/ixgbe/ixgbe_82599.c index db07789..ca91967 100644 --- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c +++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c @@ -223,6 +223,7 @@ s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw) struct ixgbe_phy_info *phy =3D &hw->phy; struct ixgbe_eeprom_info *eeprom =3D &hw->eeprom; s32 ret_val; + u16 mask; = DEBUGFUNC("ixgbe_init_ops_82599"); = @@ -291,6 +292,34 @@ s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw) /* Manageability interface */ mac->ops.set_fw_drv_ver =3D &ixgbe_set_fw_drv_ver_generic; = + /* Get bus info */ + mac->ops.get_bus_info(hw); + + /* Ensure that all locks are released before first NVM or PHY access = +*/ + + /* + * Phy lock should not fail in this early stage. If this is the case, + * it is due to an improper exit of the application. + * So force the release of the faulty lock. Release of common lock + * is done automatically by swfw_sync function. + */ + mask =3D IXGBE_GSSR_PHY0_SM << hw->bus.func; + if (hw->mac.ops.acquire_swfw_sync(hw, mask) < 0) { + DEBUGOUT1("SWFW phy%d lock released", hw->bus.func); + } + hw->mac.ops.release_swfw_sync(hw, mask); + + /* + * Those one are more tricky since they are common to all ports; but + * swfw_sync retries last long enough (1s) to be almost sure that if + * lock can not be taken it is due to an improper lock of the + * semaphore. + */ + mask =3D IXGBE_GSSR_EEP_SM | IXGBE_GSSR_MAC_CSR_SM | IXGBE_GSSR_SW_MNG_SM; + if (hw->mac.ops.acquire_swfw_sync(hw, mask) < 0) { + DEBUGOUT("SWFW common locks released"); + } + hw->mac.ops.release_swfw_sync(hw, mask); = return ret_val; } diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x540.c b/lib/librte_pmd_ixgbe= /ixgbe/ixgbe_x540.c index d3e1730..607c9c7 100644 --- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x540.c +++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x540.c @@ -55,6 +55,7 @@ s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw) struct ixgbe_phy_info *phy =3D &hw->phy; struct ixgbe_eeprom_info *eeprom =3D &hw->eeprom; s32 ret_val; + u16 mask; = DEBUGFUNC("ixgbe_init_ops_X540"); = @@ -141,6 +142,38 @@ s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw) /* Manageability interface */ mac->ops.set_fw_drv_ver =3D &ixgbe_set_fw_drv_ver_generic; = + /* Get bus info */ + mac->ops.get_bus_info(hw); + + /* Ensure that all locks are released before first NVM or PHY access = +*/ + + /* + * Phy lock should not fail in this early stage. If this is the case, + * it is due to an improper exit of the application. + * So force the release of the faulty lock. + */ + mask =3D IXGBE_GSSR_PHY0_SM << hw->bus.func; + if (hw->mac.ops.acquire_swfw_sync(hw, mask) < 0) { + if (ixgbe_get_swfw_sync_semaphore(hw) < 0) { + DEBUGOUT("SMBI lock released"); + } + ixgbe_release_swfw_sync_semaphore(hw); + DEBUGOUT1("SWFW phy%d lock released", hw->bus.func); + } + hw->mac.ops.release_swfw_sync(hw, mask); + + /* + * Those one are more tricky since they are common to all ports; but + * swfw_sync retries last long enough (1s) to be almost sure that if + * lock can not be taken it is due to an improper lock of the + * semaphore. + */ + mask =3D IXGBE_GSSR_EEP_SM | IXGBE_GSSR_MAC_CSR_SM | IXGBE_GSSR_SW_MNG_SM; + if (hw->mac.ops.acquire_swfw_sync(hw, mask) < 0) { + DEBUGOUT("SWFW common locks released"); + } + hw->mac.ops.release_swfw_sync(hw, mask); + return ret_val; } = -- 1.7.10.4 -------------------------------------------------------------- Intel Shannon Limited Registered in Ireland Registered Office: Collinstown Industrial Park, Leixlip, County Kildare Registered Number: 308263 Business address: Dromore House, East Park, Shannon, Co. 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