From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 3E2648D9A for ; Tue, 27 Oct 2015 16:56:07 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 27 Oct 2015 08:56:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,205,1444719600"; d="scan'208";a="672794405" Received: from irsmsx154.ger.corp.intel.com ([163.33.192.96]) by orsmga003.jf.intel.com with ESMTP; 27 Oct 2015 08:56:04 -0700 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.75]) by IRSMSX154.ger.corp.intel.com ([169.254.12.252]) with mapi id 14.03.0248.002; Tue, 27 Oct 2015 15:55:48 +0000 From: "Ananyev, Konstantin" To: Jan Viktorin , Thomas Monjalon , "Hunt, David" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 16/16] acl: check for SSE 4.1 support Thread-Index: AQHREA07dMBG4C3UkECveouLhxVmPJ5/eovQ Date: Tue, 27 Oct 2015 15:55:48 +0000 Message-ID: <2601191342CEEE43887BDE71AB97725836AB5935@irsmsx105.ger.corp.intel.com> References: <1445877458-31052-1-git-send-email-viktorin@rehivetech.com> <1445877458-31052-17-git-send-email-viktorin@rehivetech.com> In-Reply-To: <1445877458-31052-17-git-send-email-viktorin@rehivetech.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 16/16] acl: check for SSE 4.1 support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Oct 2015 15:56:07 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jan Viktorin > Sent: Monday, October 26, 2015 4:38 PM > To: Thomas Monjalon; Hunt, David; dev@dpdk.org > Subject: [dpdk-dev] [PATCH v2 16/16] acl: check for SSE 4.1 support >=20 > The main goal of this check is to avoid passing the -msse4.1 > option to the GCC that does not support it (like arm toolchains). >=20 > Anyway, the ACL library does not compile on ARM. >=20 > Signed-off-by: Jan Viktorin > --- > lib/librte_acl/Makefile | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile > index 7a1cf8a..401fb8c 100644 > --- a/lib/librte_acl/Makefile > +++ b/lib/librte_acl/Makefile > @@ -50,7 +50,11 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) +=3D acl_gen.c > SRCS-$(CONFIG_RTE_LIBRTE_ACL) +=3D acl_run_scalar.c > SRCS-$(CONFIG_RTE_LIBRTE_ACL) +=3D acl_run_sse.c >=20 > +CC_SSE4_1_SUPPORT :=3D $(shell $(CC) -msse4.1 -dM -E - < /dev/null >/dev= /null 2>&1 && echo 1) > + > +ifeq ($(CC_SSE4_1_SUPPORT),1) > CFLAGS_acl_run_sse.o +=3D -msse4.1 > +endif I don't think acl_run_sse.c would compile if SSE4_1 is not supported. So, I think you need to do same thing, as is done for AVX2: Compile in acl_run_sse.c only if SSE41 is supported by the compiler: =20 - SRCS-$(CONFIG_RTE_LIBRTE_ACL) +=3D acl_run_sse.c - -CFLAGS_acl_run_sse.o +=3D -msse4.1 +CC_SSE41_SUPPORT=3D$(shell $(CC) -msse4.1 -dM -E - &1 | \ grep -q && echo 1) +ifeq ($(CC_SSE41_SUPPORT), 1) + SRCS-$(CONFIG_RTE_LIBRTE_ACL) +=3D acl_run_sse.c + CFLAGS_rte_acl.o +=3D -DCC_SSE41_SUPPORT + CFLAGS_acl_run_sse.o +=3D -msse4.1=09 +endif And then change rte_acl_init() accordingly. Something like: int __attribute__ ((weak)) rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx, __rte_unused const uint8_t **data, __rte_unused uint32_t *results, __rte_unused uint32_t num, __rte_unused uint32_t categories) { return -ENOTSUP; } .... static void __attribute__((constructor)) rte_acl_init(void) { enum rte_acl_classify_alg alg =3D RTE_ACL_CLASSIFY_DEFAULT; #if defined(CC_AVX2_SUPPORT) if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) alg =3D RTE_ACL_CLASSIFY_AVX2; else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1)) #elif defined (CC_SSE41_SUPPORT) if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1)) alg =3D RTE_ACL_CLASSIFY_SSE; #endif rte_acl_set_default_classify(alg); } After that, I suppose, you should be able to build and (probably use) librt= e_acl on arm. Konstantin