From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 8A0E958D4 for ; Fri, 27 Nov 2015 15:09:26 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 27 Nov 2015 06:09:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,351,1444719600"; d="scan'208";a="848307550" Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by fmsmga001.fm.intel.com with ESMTP; 27 Nov 2015 06:09:25 -0800 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.203]) by IRSMSX102.ger.corp.intel.com ([169.254.2.251]) with mapi id 14.03.0248.002; Fri, 27 Nov 2015 14:09:22 +0000 From: "Ananyev, Konstantin" To: "Qiu, Michael" Thread-Topic: [PATCH] lib/librte_sched: Fix compile with gcc 4.3.4 Thread-Index: AQHRKQpbzWQPg8M5Z0KzSO/QK3W11Z6vy+3QgAAaSQCAAAE34A== Date: Fri, 27 Nov 2015 14:09:22 +0000 Message-ID: <2601191342CEEE43887BDE71AB97725836ACDB8A@irsmsx105.ger.corp.intel.com> References: <1448534997-24297-1-git-send-email-michael.qiu@intel.com> <40264692.U54vlS2tjY@xps13> <533710CFB86FA344BFBF2D6802E6028621B8CCF5@SHSMSX101.ccr.corp.intel.com> <14808329.F48z9c4v47@xps13> <4BFDBCEE-D3A0-4C2F-8F78-8A7CD1FF08B6@intel.com>, <2601191342CEEE43887BDE71AB97725836ACDA70@irsmsx105.ger.corp.intel.com> In-Reply-To: Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH] lib/librte_sched: Fix compile with gcc 4.3.4 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Nov 2015 14:09:27 -0000 > -----Original Message----- > From: Qiu, Michael > Sent: Friday, November 27, 2015 2:02 PM > To: Ananyev, Konstantin > Cc: Thomas Monjalon; dev@dpdk.org > Subject: Re: [PATCH] lib/librte_sched: Fix compile with gcc 4.3.4 >=20 > I just replied that Marco AVX only exist in gcc version < 4.4 , otherwise= it will not exist. If macro __AVX__ not defined, then=20 #if defined(__AVX__) would always be false and SCHED_VECTOR_ENABLE also wouldn't be defined. So still don't understand why that is a problem Konstantin >=20 > What's your suggest will not work if gcc version greater than 4.3. >=20 > So still need to check gcc version. Any other solution? >=20 > Thanks, > Michael >=20 > > =1B$B:_=1B(B 2015=1B$BG/=1B(B11=1B$B7n=1B(B27=1B$BF|!$2<8a=1B(B8:34=1B$= B!$=1B(BAnanyev, Konstantin =1B$B > > > > >> -----Original Message----- > >> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Qiu, Michael > >> Sent: Friday, November 27, 2015 11:53 AM > >> To: Thomas Monjalon > >> Cc: dev@dpdk.org > >> Subject: Re: [dpdk-dev] [PATCH] lib/librte_sched: Fix compile with gcc= 4.3.4 > >> > >> really=1B$B!)=1B(BI don't think so. > >> > >> AVX Marco only exist in the gcc version below 4.4, I still need to ch= eck if below or beyond 4.4 am I right? > >> > >> Thanks, > >> Michael > > > > > > If you look at lib/librte_eal/common/include/arch/x86/rte_vect.h, you'l= l see the code similar > > to one you are trying to put into rte_shed.c: > > > > lib/librte_eal/common/include/arch/x86/rte_vect.h: > > ... > > #if (defined(__ICC) || (__GNUC__ =3D=3D 4 && __GNUC_MINOR__ < 4)) > > > > #ifdef __SSE__ > > #include > > #endif > > > > #ifdef __SSE2__ > > #include > > #endif > > > > #ifdef __SSE3__ > > #include > > #endif > > > > #if defined(__SSE4_2__) || defined(__SSE4_1__) > > #include > > #endif > > > > #if defined(__AVX__) > > #include > > #endif > > > > #else > > > > #include > > > > #endif > > ... > > > > So I think you can do just like that: > > > > #include > > #if defined(__AVX__) > > #define SCHED_VECTOR_ENABLE > > #endif > > > > inside rte_sched.c > > > > Konstantin > > > > > >> > >> > >>> =1B$B:_=1B(B 2015=1B$BG/=1B(B11=1B$B7n=1B(B27=1B$BF|!$2<8a=1B(B5:01= =1B$B!$=1B(BThomas Monjalon =1B$B >>> > >>> 2015-11-27 02:26, Qiu, Michael: > >>>>>> On 2015/11/27 5:29, Thomas Monjalon wrote: > >>>>>> 2015-11-26 18:49, Michael Qiu: > >>>>>> gcc 4.3.4 does not include "immintrin.h", and will post below erro= r: > >>>>>> lib/librte_sched/rte_sched.c:56:23: error: > >>>>>> immintrin.h: No such file or directory > >>>>>> > >>>>>> To avoid this issue, a gcc version check is need and a flag to ind= icate > >>>>>> vector ablility. > >>>>> [...] > >>>>>> +#if (defined(__ICC) || (__GNUC__ =3D=3D 4 && __GNUC_MINOR__ < 4)= ) > >>>>>> + > >>>>>> +#if defined(__AVX__) > >>>>>> #include > >>>>>> +#define SCHED_VECTOR_ENABLE > >>>>>> +#endif > >>>>>> + > >>>>>> +#else > >>>>>> + > >>>>>> +#include > >>>>>> +#define SCHED_VECTOR_ENABLE > >>>>>> + > >>>>>> +#endif > >>>>> This kind of complication is managed by EAL. > >>>>> I think we should include rte_vect.h. > >>>> > >>>> As I know here it needs a flag to identify whether the platform supp= ort > >>>> AVX, if not it will not use it, so I don't know if we could only sim= ply > >>>> include rte_vect.h? > >>> > >>> It's not exclusive. > >>> You can include rte_vect.h and check AVX to define SCHED_VECTOR_ENABL= E. > >>>