From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 75A3E3787 for ; Thu, 3 Dec 2015 12:02:10 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 03 Dec 2015 03:02:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,377,1444719600"; d="scan'208";a="833392244" Received: from irsmsx107.ger.corp.intel.com ([163.33.3.99]) by orsmga001.jf.intel.com with ESMTP; 03 Dec 2015 03:02:08 -0800 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.203]) by IRSMSX107.ger.corp.intel.com ([169.254.10.132]) with mapi id 14.03.0248.002; Thu, 3 Dec 2015 11:02:07 +0000 From: "Ananyev, Konstantin" To: Jerin Jacob , Thomas Monjalon Thread-Topic: [dpdk-dev] [PATCH 3/4] eal/arm: Enable lpm/table/pipeline libs Thread-Index: AQHRLCUPRiQQmogn20CfeMIlSdYAtp62VgYAgAEBsBGAAB2HgIAADc8AgAArPICAABZ9AIAAIyyAgAADmICAAAEkAIABFmiAgAAWXZA= Date: Thu, 3 Dec 2015 11:02:07 +0000 Message-ID: <2601191342CEEE43887BDE71AB97725836AD013F@irsmsx105.ger.corp.intel.com> References: <1448995276-9599-1-git-send-email-jianbo.liu@linaro.org> <2275492.7Tn0tJ2v06@xps13> <20151202165302.GA2452@localhost.localdomain> <2257776.TI734NhvVv@xps13> <20151203093334.GA12727@localhost.localdomain> In-Reply-To: <20151203093334.GA12727@localhost.localdomain> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH 3/4] eal/arm: Enable lpm/table/pipeline libs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 03 Dec 2015 11:02:11 -0000 Hi Jerin, > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob > Sent: Thursday, December 03, 2015 9:34 AM > To: Thomas Monjalon > Cc: dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH 3/4] eal/arm: Enable lpm/table/pipeline li= bs >=20 > On Wed, Dec 02, 2015 at 05:57:10PM +0100, Thomas Monjalon wrote: > > 2015-12-02 22:23, Jerin Jacob: > > > On Wed, Dec 02, 2015 at 05:40:13PM +0100, Thomas Monjalon wrote: > > > > 2015-12-02 20:04, Jerin Jacob: > > > > > On Wed, Dec 02, 2015 at 09:13:51PM +0800, Jianbo Liu wrote: > > > > > > On 2 December 2015 at 18:39, Jerin Jacob wrote: > > > > > > > AND they include "rte_lpm.h"(it internally includes rte_vect.= h) > > > > > > > that lead to multiple definition and its not good. > > > > > > > > > > > > > But you will have similar issue since "typedef int32x4_t __m128= i" > > > > > > appears in both your patch and this header file. > > > > > > > > > > I just tested it, it won't break, back to back "typedef int32x4_t= __m128i" > > > > > is fine(unlike inline function). > > > > > > > > > > my intention to keep __m128i "as is" because changing the __m128= i to rte_??? > > > > > something would break the ABI. > > > > > > > > Isn't it already broken in 2.2? > > > > > > Does it mean, You would like to have rte_128i(or similar) kind of > > > abstraction to represent 128bit SIMD variable in DPDK? > > > > If you are convinced that it is the best way to write a generic code, y= es. >=20 > I grep-ed through DPDK API list to see the dependency with SIMD in API > definition.I see only rte_lpm_lookupx4 API has SIMD dependency in API > definition. >=20 > I believe that's the root cause of the problem. IMO, The > better way to fix this would be to remove __m128i from API and have more > general representation to remove the architecture dependency from API >=20 > something like this, >=20 > rte_lpm_lookupx4(const struct rte_lpm *lpm, uint32_t *ip, uint16_t > hop[4], uint16_t defv) >=20 > instead of >=20 > rte_lpm_lookupx4(const struct rte_lpm *lpm, __m128i ip, uint16_t > hop[4], uint16_t defv) The idea for that function was that rte_lpm_lookupx4() accepts 4 IPv4 addre= sses that are: 1. already in 128bit register 2. 'prepared' - byte swap is already done for them if needed.=20 About ways to fix __m128i dependency: as I can see x86 and arm DPDK code already has xmm_t typedef: =20 $ find lib -type f | xargs grep xmm_t | grep typedef lib/librte_eal/common/include/arch/x86/rte_vect.h:typedef __m128i xmm_t; lib/librte_eal/common/include/arch/arm/rte_vect.h:typedef int32x4_t xmm_t; Why not to change rte_lpm_lookupx4() to accept xmm_t as input parameter. As I understand it would solve the problem, and wouldn't introduce any API/= ABI breakage, right? Konstantin >=20 > Now I am not sure why this API was created like this, from l3fwd.c > example, it looks to accommodate the IPV4 byte swap[1]. If it's true, > maybe we can have eal byte swap abstraction for optimized byte swap on > memory for 4 IP address in one shot >=20 > or >=20 > Have rte_lpm_lookupx4 take an argument for byte swap or not ? >=20 > or >=20 > something similar? >=20 > Thoughts ? >=20 > [1] > const __m128i bswap_mask =3D _mm_set_epi8(12, 13, 14, 15, 8, 9, 10, 11, > 4, 5, 6, 7, 0, 1, 2, 3); > /* Byte swap 4 IPV4 addresses. */ > dip =3D _mm_shuffle_epi8(dip, bswap_mask); >=20 > Jerin >=20 > > I think the most important question is to know what is the best solutio= n > > for performance and maintainability. The API/ABI questions will be cons= idered > > after. > > > > Thanks for your involvement guys.