From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 3CB142A66 for ; Thu, 8 Dec 2016 11:30:57 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP; 08 Dec 2016 02:30:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,318,1477983600"; d="scan'208";a="910030769" Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by orsmga003.jf.intel.com with ESMTP; 08 Dec 2016 02:30:56 -0800 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.43]) by IRSMSX103.ger.corp.intel.com ([169.254.3.91]) with mapi id 14.03.0248.002; Thu, 8 Dec 2016 10:30:43 +0000 From: "Ananyev, Konstantin" To: "Yang, Zhiyong" , Thomas Monjalon CC: "dev@dpdk.org" , "yuanhan.liu@linux.intel.com" , "Richardson, Bruce" , "De Lara Guarch, Pablo" Thread-Topic: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on IA platform Thread-Index: AQHSTHcpRTnyVY6QF0Gsm+MMelrW8KD0c9uAgAlAQICAABxAEIAACH0AgAAFB4A= Date: Thu, 8 Dec 2016 10:30:42 +0000 Message-ID: <2601191342CEEE43887BDE71AB9772583F0E568B@irsmsx105.ger.corp.intel.com> References: <1480926387-63838-1-git-send-email-zhiyong.yang@intel.com> <1480926387-63838-2-git-send-email-zhiyong.yang@intel.com> <7223515.9TZuZb6buy@xps13> <2601191342CEEE43887BDE71AB9772583F0E55B0@irsmsx105.ger.corp.intel.com> In-Reply-To: Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on IA platform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 10:30:58 -0000 > -----Original Message----- > From: Yang, Zhiyong > Sent: Thursday, December 8, 2016 9:53 AM > To: Ananyev, Konstantin ; Thomas Monjalon <= thomas.monjalon@6wind.com> > Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce ; De Lara Guarch, Pablo > > Subject: RE: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on I= A platform >=20 > Hi=1B$B!$=1B(B Konstantin: >=20 > > -----Original Message----- > > From: Ananyev, Konstantin > > Sent: Thursday, December 8, 2016 5:26 PM > > To: Yang, Zhiyong ; Thomas Monjalon > > > > Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce > > ; De Lara Guarch, Pablo > > > > Subject: RE: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on > > IA platform > > > > > > Hi Zhiyong, > > > > > > > > HI, Thomas: > > > Sorry for late reply. I have been being always considering your > > suggestion. > > > > > > > -----Original Message----- > > > > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > > > > Sent: Friday, December 2, 2016 6:25 PM > > > > To: Yang, Zhiyong > > > > Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce > > > > ; Ananyev, Konstantin > > > > ; De Lara Guarch, Pablo > > > > > > > > Subject: Re: [dpdk-dev] [PATCH 1/4] eal/common: introduce > > rte_memset > > > > on IA platform > > > > > > > > 2016-12-05 16:26, Zhiyong Yang: > > > > > +#ifndef _RTE_MEMSET_X86_64_H_ > > > > > > > > Is this implementation specific to 64-bit? > > > > > > > > > > Yes. > > > > > > > > + > > > > > +#define rte_memset memset > > > > > + > > > > > +#else > > > > > + > > > > > +static void * > > > > > +rte_memset(void *dst, int a, size_t n); > > > > > + > > > > > +#endif > > > > > > > > If I understand well, rte_memset (as rte_memcpy) is using the most > > > > recent instructions available (and enabled) when compiling. > > > > It is not adapting the instructions to the run-time CPU. > > > > There is no need to downgrade at run-time the instruction set as it > > > > is obviously not a supported case, but it would be nice to be able > > > > to upgrade a "default compilation" at run-time as it is done in rte= _acl. > > > > I explain this case more clearly for reference: > > > > > > > > We can have AVX512 supported in the compiler but disable it when > > > > compiling > > > > (CONFIG_RTE_MACHINE=3Dsnb) in order to build a binary running almos= t > > > > everywhere. > > > > When running this binary on a CPU having AVX512 support, it will no= t > > > > benefit of the AVX512 improvement. > > > > Though, we can compile an AVX512 version of some functions and use > > > > them only if the running CPU is capable. > > > > This kind of miracle can be achieved in two ways: > > > > > > > > 1/ For generic C code compiled with a recent GCC, a function can be > > > > built for several CPUs thanks to the attribute target_clones. > > > > > > > > 2/ For manually optimized functions using CPU-specific intrinsics o= r > > > > asm, it is possible to build them with non-default flags thanks to = the > > attribute target. > > > > > > > > 3/ For manually optimized files using CPU-specific intrinsics or > > > > asm, we use specifics flags in the makefile. > > > > > > > > The function clone in case 1/ is dynamically chosen at run-time > > > > through ifunc resolver. > > > > The specific functions in cases 2/ and 3/ must chosen at run-time b= y > > > > initializing a function pointer thanks to rte_cpu_get_flag_enabled(= ). > > > > > > > > Note that rte_hash and software crypto PMDs have a run-time check > > > > with > > > > rte_cpu_get_flag_enabled() but do not override CFLAGS in the Makefi= le. > > > > Next step for these libraries? > > > > > > > > Back to rte_memset, I think you should try the solution 2/. > > > > > > I have read the ACL code, if I understand well , for complex algo > > > implementation, it is good idea, but Choosing functions at run time > > > will bring some overhead. For frequently called function Which > > > consumes small cycles, the overhead maybe is more than the gains > > optimizations brings For example, for most applications in dpdk, memset= only > > set N =3D 10 or 12bytes. It consumes fewer cycles. > > > > But then what the point to have an rte_memset() using vector instructio= ns at > > all? > > From what you are saying the most common case is even less then SSE > > register size. > > Konstantin >=20 > For most cases, memset is used such as memset(address, 0, sizeof(struct x= xx)); Ok then I suppose for such cases you don't need any special function and me= mset() would still be the best choice, right? > The use case here is small by accident, I only give an example here. > but rte_memset is introduced to need consider generic case. We can have rte_memset_huge() or so instead, and document that it should be used for sizes greater than some cutoff point. Inside it you can just call a function pointer installed at startup (same a= s rte_acl_classify() does). For big sizes, I suppose the price of extra function pointer call would not= affect performance much. For sizes smaller then this cutoff point you still can use either rte_memse= t_scalar() or just normal rte_memset(). Something like that: extern void *(*__rte_memset_vector)( (void *s, int c, size_t n); static inline void* rte_memset_huge(void *s, int c, size_t n) { return __rte_memset_vector(s, c, n); } static inline void * rte_memset(void *s, int c, size_t n) { If (n < XXX) return rte_memset_scalar(s, c, n); else return rte_memset_huge(s, c, n); } XXX could be either a define, or could also be a variable, so it can be set= uped at startup, depending on the architecture. Would that work? Konstantin > sizeof(struct xxx) is not limited to very small size, such as less than = SSE register size. > I just want to say that the size for the most use case is not very large,= So cycles consumed > Is not large. It is not suited to choose function at run-time since overh= ead is considered. >=20 > thanks > Zhiyong