From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 7FD8C58EC for ; Tue, 13 Jun 2017 19:22:10 +0200 (CEST) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jun 2017 10:22:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,338,1493708400"; d="scan'208";a="113920039" Received: from irsmsx101.ger.corp.intel.com ([163.33.3.153]) by fmsmga005.fm.intel.com with ESMTP; 13 Jun 2017 10:22:08 -0700 Received: from irsmsx109.ger.corp.intel.com ([169.254.13.250]) by IRSMSX101.ger.corp.intel.com ([163.33.3.153]) with mapi id 14.03.0319.002; Tue, 13 Jun 2017 18:22:07 +0100 From: "Ananyev, Konstantin" To: "Richardson, Bruce" , "Zhang, Qi Z" , "Yigit, Ferruh" CC: "dev@dpdk.org" , "Lu, Wenzhuo" , "Zhang, Helin" , "Zhang, Qi Z" Thread-Topic: [dpdk-dev] [PATCH v4 1/2] net/ixgbe: add SSE4.1 support to vPMD's minimum requirement Thread-Index: AQHS5GJotBh4zGS5m0G5JdKaCA5PQaIjChmg Date: Tue, 13 Jun 2017 17:22:06 +0000 Message-ID: <2601191342CEEE43887BDE71AB9772583FB08E2C@IRSMSX109.ger.corp.intel.com> References: <1494991243-21940-1-git-send-email-qi.z.zhang@intel.com> <1497344306-24626-1-git-send-email-qi.z.zhang@intel.com> <59AF69C657FD0841A61C55336867B5B07217DD56@IRSMSX104.ger.corp.intel.com> In-Reply-To: <59AF69C657FD0841A61C55336867B5B07217DD56@IRSMSX104.ger.corp.intel.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4 1/2] net/ixgbe: add SSE4.1 support to vPMD's minimum requirement X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Jun 2017 17:22:11 -0000 > -----Original Message----- > From: Richardson, Bruce > Sent: Tuesday, June 13, 2017 5:31 PM > To: Zhang, Qi Z ; Ananyev, Konstantin ; Yigit, Ferruh > Cc: dev@dpdk.org; Lu, Wenzhuo ; Zhang, Helin ; Zhang, Qi Z > Subject: RE: [dpdk-dev] [PATCH v4 1/2] net/ixgbe: add SSE4.1 support to v= PMD's minimum requirement >=20 > > -----Original Message----- > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Qi Zhang > > Sent: Tuesday, June 13, 2017 9:58 AM > > To: Ananyev, Konstantin ; Yigit, Ferruh > > > > Cc: dev@dpdk.org; Lu, Wenzhuo ; Zhang, Helin > > ; Zhang, Qi Z > > Subject: [dpdk-dev] [PATCH v4 1/2] net/ixgbe: add SSE4.1 support to vPM= D's > > minimum requirement > > > > x86 vPMD will be disabled if currently platform does not support SSE4.1= . > > This is the prework to enable vPMD ptype offload where SSE4.1 > > instrunctions will be involved. > > > > Signed-off-by: Qi Zhang > > --- > > drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c > > b/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c > > index a7bc199..fbbd872 100644 > > --- a/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c > > +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c > > @@ -652,5 +652,9 @@ ixgbe_txq_vec_setup(struct ixgbe_tx_queue *txq) in= t > > __attribute__((cold)) ixgbe_rx_vec_dev_conf_condition_check(struct > > rte_eth_dev *dev) { > > + /* need SSE4.1 support */ > > + if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1)) > > + return -1; > > + > > return ixgbe_rx_vec_dev_conf_condition_check_default(dev); > > } >=20 > Quite a few things for DPDK on x86 and x86_64 depend on SSE4.x now. I thi= nk we should just up the minimum supported x86 CPU > architecture for DPDK to require SSE4.2 and be done with it. SSE4.2 has b= een around for almost a decade now > (https://en.wikipedia.org/wiki/SSE4#SSE4.2), and so I would consider it u= nlikely that anyone wants to use DPDK on a machine which does > not have that instruction set supported. >=20 > Doing so would mean we remove all conditional compilation settings for ou= r x86 vector drivers to add -msse flags, and can replace these > runtime checks in each driver with a single check in EAL init to ensure t= he CPU supports SSE4.2. Possibly other cleanup could be done as > well. >=20 > Thoughts? any objections? +1 to bump min supported HW to sse4.2 Konstantin