From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id E562D1B60D for ; Thu, 2 Nov 2017 16:52:17 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP; 02 Nov 2017 08:52:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,334,1505804400"; d="scan'208";a="1032691004" Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by orsmga003.jf.intel.com with ESMTP; 02 Nov 2017 08:52:11 -0700 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.67]) by IRSMSX102.ger.corp.intel.com ([169.254.2.180]) with mapi id 14.03.0319.002; Thu, 2 Nov 2017 15:52:11 +0000 From: "Ananyev, Konstantin" To: Guduri Prathyusha CC: "dev@dpdk.org" , "Jianbo.Liu@arm.com" , "guduriprathyusha@gmail.com" , "Kantecki, Tomasz" Thread-Topic: [dpdk-dev] [PATCH ] examples/l3fwd: fix aliasing in port grouping Thread-Index: AQHTU+dVL1v39Y21s0ue+MuCIWi6PKMBKhMAgAAOAwCAAAFjMA== Date: Thu, 2 Nov 2017 15:52:10 +0000 Message-ID: <2601191342CEEE43887BDE71AB9772585FAB884B@irsmsx105.ger.corp.intel.com> References: <20171102143114.24380-1-gprathyusha@caviumnetworks.com> <2601191342CEEE43887BDE71AB9772585FAB87F0@irsmsx105.ger.corp.intel.com> <20171102153327.GA24586@cavium.com> In-Reply-To: <20171102153327.GA24586@cavium.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMjZlODViODEtM2YzMS00ZjNjLThkMWItNjlmMTZhMTlmNmM1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IkdIbEVRdUF0dWFMZWxJRlNqU1VTa3BZSzlEaWZqVGhOTnRsVWlmNUpQWmM9In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH ] examples/l3fwd: fix aliasing in port grouping X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Nov 2017 15:52:18 -0000 > -----Original Message----- > From: Guduri Prathyusha [mailto:gprathyusha@caviumnetworks.com] > Sent: Thursday, November 2, 2017 3:34 PM > To: Ananyev, Konstantin > Cc: dev@dpdk.org; Jianbo.Liu@arm.com; guduriprathyusha@gmail.com; Kanteck= i, Tomasz > Subject: Re: [dpdk-dev] [PATCH ] examples/l3fwd: fix aliasing in port gro= uping >=20 > On Thu, Nov 02, 2017 at 02:46:43PM +0000, Ananyev, Konstantin wrote: > > Hi, > Hi > > > > > -----Original Message----- > > > From: Guduri Prathyusha [mailto:gprathyusha@caviumnetworks.com] > > > Sent: Thursday, November 2, 2017 2:31 PM > > > To: Kantecki, Tomasz > > > Cc: Jianbo.Liu@arm.com; guduriprathyusha@gmail.com; Ananyev, Konstant= in ; dev@dpdk.org; Guduri > > > Prathyusha > > > Subject: [dpdk-dev] [PATCH ] examples/l3fwd: fix aliasing in port gro= uping > > > > > > With -f-strict-aliasing enabled by default from -O2, gcc > 5.x gives > > > undefined behavior in port_groupx4. 'pn' and 'pnum' are two different > > > pointers pointing to same chunk of memory and with -f-strict-aliasing= the > > > pointers are assumed to be pointing to different memory and compiler > > > reorders instructions that depend on pnum and pn. This breaks port > > > grouping algorithm. > > > > > > This patch eliminates the usage of union and uses memcpy for copying > > > gptbl[v].pnum to pn. memcpy when applied on built_in constant size do= es > > > not call its library implementation but uses appropriate LD and ST > > > instructions directly and hence no performance overhead. > > > > > > Fixes: 569b290cdb36 ("examples/l3fwd: add NEON implementation") > > > Fixes: af1694d94bf1 ("examples/l3fwd: fix crash with gcc 5") > > > Signed-off-by: Guduri Prathyusha > > > --- > > > examples/l3fwd/l3fwd_neon.h | 11 +++-------- > > > examples/l3fwd/l3fwd_sse.h | 11 +++-------- > > > 2 files changed, 6 insertions(+), 16 deletions(-) > > > > > > diff --git a/examples/l3fwd/l3fwd_neon.h b/examples/l3fwd/l3fwd_neon.= h > > > index 4bc161394..10a602a04 100644 > > > --- a/examples/l3fwd/l3fwd_neon.h > > > +++ b/examples/l3fwd/l3fwd_neon.h > > > @@ -100,11 +100,6 @@ static inline uint16_t * > > > port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *lp, uint16x8_t dp1, > > > uint16x8_t dp2) > > > { > > > - union { > > > - uint16_t u16[FWDSTEP + 1]; > > > - uint64_t u64; > > > - } *pnum =3D (void *)pn; > > > - > > > int32_t v; > > > uint16x8_t mask =3D {1, 2, 4, 8, 0, 0, 0, 0}; > > > > > > @@ -117,9 +112,9 @@ port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *= lp, uint16x8_t dp1, > > > > > > /* if dest port value has changed. */ > > > if (v !=3D GRPMSK) { > > > - pnum->u64 =3D gptbl[v].pnum; > > > - pnum->u16[FWDSTEP] =3D 1; > > > - lp =3D pnum->u16 + gptbl[v].idx; > > > + rte_memcpy(pn, &gptbl[v].pnum, sizeof(gptbl[v].pnum)); > > > + pn[FWDSTEP] =3D 1; > > > + lp =3D pn + gptbl[v].idx; > > > } > > > > > > return lp; > > > diff --git a/examples/l3fwd/l3fwd_sse.h b/examples/l3fwd/l3fwd_sse.h > > > index 831760f02..79a71d77e 100644 > > > --- a/examples/l3fwd/l3fwd_sse.h > > > +++ b/examples/l3fwd/l3fwd_sse.h > > > @@ -98,11 +98,6 @@ processx4_step3(struct rte_mbuf *pkt[FWDSTEP], uin= t16_t dst_port[FWDSTEP]) > > > static inline uint16_t * > > > port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *lp, __m128i dp1, __= m128i dp2) > > > { > > > - union { > > > - uint16_t u16[FWDSTEP + 1]; > > > - uint64_t u64; > > > - } *pnum =3D (void *)pn; > > > - > > > int32_t v; > > > > > > dp1 =3D _mm_cmpeq_epi16(dp1, dp2); > > > @@ -114,9 +109,9 @@ port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *= lp, __m128i dp1, __m128i dp2) > > > > > > /* if dest port value has changed. */ > > > if (v !=3D GRPMSK) { > > > - pnum->u64 =3D gptbl[v].pnum; > > > - pnum->u16[FWDSTEP] =3D 1; > > > - lp =3D pnum->u16 + gptbl[v].idx; > > > + rte_memcpy(pn, &gptbl[v].pnum, sizeof(gptbl[v].pnum)); > > > + pn[FWDSTEP] =3D 1; > > > + lp =3D pn + gptbl[v].idx; > > > > Could you explain a bit more here - which exactly instructions were reo= rdered > > and what kind of problems did it cause? > > Specially on IA? >=20 > This issue is observed on ARM since ARM gcc is more aggressive in > reordering than x86 gcc. Ok, then if x86 is not affected why to modify l3fwd_sse.h at all? Unless there is a reproducible problem with x86 - my preference would be to keep that file intact. > In ARM when v !=3D GRPMSK, the following > instructions ordering is not guarenteed because of strict aliasing. >=20 > lp[0] +=3D gptbl[v].lpv; > pnum->u64 =3D gptbl[v].pnum; > pnum->u16[FWDSTEP] =3D 1; > lp =3D pnum->u16 + gptbl[v].idx; Ok, so what in particular is reordered by the compiler: lp[0] +=3D gptbl[v].lpv; (1) pnum->u64 =3D gptbl[v].pnum; (2) pnum->u16[FWDSTEP] =3D 1; (3) lp =3D pnum->u16 + gptbl[v].idx; (4) (2) and (3)? If so I am not sure how it could be a problem: they do stores to the different locations. (1) and (4) as I can see shouldn't be reordered. Anyway - if you think this a compiler reordering issue, then adding rte_compiler_barrier() should fix the issue, right? >=20 > That results in wrong lp[0] updation. > memcpy in this case will avoid this problem. >=20 > > In any case I don't think using rte_memcpy is a good thing to use here: > > it is a huge inline function - way too much to copy just 64 bit variabl= e. >=20 > I agree that rte_memcpy is overhead in this case but how about using > memcpy that will not use library implementation if the size is constant. > memcpy with constant size uses built_in_memcpy that does not add > performance overhead. On x86 rte_memcpy() doesn't call libc memcpy() at all - it is a separate fu= nction: ib/librte_eal/common/include/arch/x86/rte_memcpy.h >=20 > Thoughts? As I said - if x86 is not affected - please keep l3fwd_sse.h intact. If it does (still not sure how) - check would compiler barrier help here. Konstantin=20