From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 705F51D90 for ; Sun, 3 Dec 2017 12:19:38 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Dec 2017 03:19:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,353,1508828400"; d="scan'208";a="9921889" Received: from irsmsx104.ger.corp.intel.com ([163.33.3.159]) by fmsmga001.fm.intel.com with ESMTP; 03 Dec 2017 03:19:36 -0800 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.67]) by IRSMSX104.ger.corp.intel.com ([163.33.3.159]) with mapi id 14.03.0319.002; Sun, 3 Dec 2017 11:19:35 +0000 From: "Ananyev, Konstantin" To: "Dai, Wei" , "Wu, Jingjing" , "Xing, Beilei" CC: "dev@dpdk.org" Thread-Topic: [PATCH v6] net/i40e: determine number of queues per VF during run time Thread-Index: AQHTZ1oeVcExKni74EGiBItodLgPA6MxgfZw Date: Sun, 3 Dec 2017 11:19:34 +0000 Message-ID: <2601191342CEEE43887BDE71AB9772585FAC3E8D@irsmsx105.ger.corp.intel.com> References: <1511503969-22528-1-git-send-email-wei.dai@intel.com> <1511770139-48286-1-git-send-email-wei.dai@intel.com> In-Reply-To: <1511770139-48286-1-git-send-email-wei.dai@intel.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNTM4NDgyMDgtYmExYy00MjBmLTlmMDQtMjdlZWJiMzViMTNhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6InpQOWdmOE5MS0FhREtBdE5JbG1VeFp2TVlqeithZGpwNDFhNHA5R2dLV2s9In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v6] net/i40e: determine number of queues per VF during run time X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 03 Dec 2017 11:19:39 -0000 Hi Wei, > -----Original Message----- > From: Dai, Wei > Sent: Monday, November 27, 2017 8:09 AM > To: Wu, Jingjing ; Xing, Beilei ; Ananyev, Konstantin > Cc: dev@dpdk.org; Dai, Wei > Subject: [PATCH v6] net/i40e: determine number of queues per VF during ru= n time >=20 > Without this patch, the number of queues per i40e VF is defined as 4 > by CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=3D4 in config/common_base. > It is fixed value determined in building time and can't be changed > during run time. > With this patch, the number of queues per i40e VF can be determinated > during run time. For example, if the PCI address of an i40e VF is > aaaa:bb.cc, with the EAL parameter -w aaaa:bb.cc,queue-num-per-vf=3D8, > the number of queues per VF is 8. > If there is no "queue-num-per-vf" setting in EAL parameters, it is 4 > by default as before. And if the value after the "queue-num-per-vf" > is invalid, it is set as 4 forcibly. The valid values include 1, 2, 4, > 8, 16 . >=20 > Signed-off-by: Wei Dai >=20 > --- > v6: > fix a small bug when detecting end character of strtoul > v5: > fix git log message and WARNING of coding stype > v4: > use rte_kvargs instead of pervious parsing function; > use malloc/free instead of rte_zmalloc/rte_free. > v3: > fix WARNING of coding style issues from checkpatch@dpdk.org > v2: > fix WARNING of coding style issues from checkpatch@dpdk.org > --- > config/common_base | 1 - > drivers/net/i40e/i40e_ethdev.c | 67 ++++++++++++++++++++++++++++++++++++= ++++-- > 2 files changed, 65 insertions(+), 3 deletions(-) >=20 > diff --git a/config/common_base b/config/common_base > index e74febe..4e20389 100644 > --- a/config/common_base > +++ b/config/common_base > @@ -208,7 +208,6 @@ CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=3Dy > CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=3Dy > CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=3Dn > CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=3D64 > -CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=3D4 > CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=3D4 > # interval up to 8160 us, aligned to 2 (or default value) > CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=3D-1 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 811cc9f..6eceea1 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -3971,6 +3971,67 @@ i40e_get_cap(struct i40e_hw *hw) > return ret; > } >=20 > +#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4 > +#define QUEUE_NUM_PER_VF_ARG "queue-num-per-vf" > +static int i40e_pf_parse_vf_queue_number_handler(const char *key, > + const char *value, > + void *opaque) > +{ > + struct i40e_pf *pf; > + unsigned long num; > + char *end; > + > + pf =3D (struct i40e_pf *)opaque; > + RTE_SET_USED(key); > + > + errno =3D 0; > + num =3D strtoul(value, &end, 0); > + if (errno !=3D 0 || end =3D=3D value || *end !=3D 0) { > + PMD_DRV_LOG(WARNING, "Wrong VF queue number =3D %s, Now it is " > + "kept the value =3D %hu", value, pf->vf_nb_qp_max); > + return -(EINVAL); > + } > + > + if (num <=3D 16 && rte_is_power_of_2(num)) As a nit - better to use some macro instead of '16' here. Apart from that - looks good to me. Acked-by: Konstantin Ananyev > + pf->vf_nb_qp_max =3D (uint16_t)num; > + else > + /* here return 0 to make next valid same argument work */ > + PMD_DRV_LOG(WARNING, "Wrong VF queue number =3D %lu, it must be " > + "power of 2 and equal or less than 16 !, Now it is " > + "kept the value =3D %hu", num, pf->vf_nb_qp_max); > + > + return 0; > +} > + > +static int i40e_pf_config_vf_rxq_number(struct rte_eth_dev *dev) > +{ > + static const char * const valid_keys[] =3D {QUEUE_NUM_PER_VF_ARG, ""}; > + struct i40e_pf *pf =3D I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); > + struct rte_kvargs *kvlist; > + > + /* set default queue number per VF as 4 */ > + pf->vf_nb_qp_max =3D RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF; > + > + if (dev->device->devargs =3D=3D NULL) > + return 0; > + > + kvlist =3D rte_kvargs_parse(dev->device->devargs->args, valid_keys); > + if (kvlist =3D=3D NULL) > + return -(EINVAL); > + > + if (rte_kvargs_count(kvlist, QUEUE_NUM_PER_VF_ARG) > 1) > + PMD_DRV_LOG(WARNING, "More than one argument \"%s\" and only " > + "the first invalid or last valid one is used !", > + QUEUE_NUM_PER_VF_ARG); > + > + rte_kvargs_process(kvlist, QUEUE_NUM_PER_VF_ARG, > + i40e_pf_parse_vf_queue_number_handler, pf); > + > + rte_kvargs_free(kvlist); > + > + return 0; > +} > + > static int > i40e_pf_parameter_init(struct rte_eth_dev *dev) > { > @@ -3983,6 +4044,9 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev) > PMD_INIT_LOG(ERR, "HW configuration doesn't support SRIOV"); > return -EINVAL; > } > + > + i40e_pf_config_vf_rxq_number(dev); > + > /* Add the parameter init for LFC */ > pf->fc_conf.pause_time =3D I40E_DEFAULT_PAUSE_TIME; > pf->fc_conf.high_water[I40E_MAX_TRAFFIC_CLASS] =3D I40E_DEFAULT_HIGH_WA= TER; > @@ -3992,7 +4056,6 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev) > pf->max_num_vsi =3D hw->func_caps.num_vsis; > pf->lan_nb_qp_max =3D RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF; > pf->vmdq_nb_qp_max =3D RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM; > - pf->vf_nb_qp_max =3D RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF; >=20 > /* FDir queue/VSI allocation */ > pf->fdir_qp_offset =3D 0; > @@ -4022,7 +4085,7 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev) > pf->vf_qp_offset =3D pf->lan_qp_offset + pf->lan_nb_qps; > if (hw->func_caps.sr_iov_1_1 && pci_dev->max_vfs) { > pf->flags |=3D I40E_FLAG_SRIOV; > - pf->vf_nb_qps =3D RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF; > + pf->vf_nb_qps =3D pf->vf_nb_qp_max; > pf->vf_num =3D pci_dev->max_vfs; > PMD_DRV_LOG(DEBUG, > "%u VF VSIs, %u queues per VF VSI, in total %u queues", > -- > 2.7.5