From: Thomas Monjalon <thomas@monjalon.net>
To: "Morten Brørup" <mb@smartsharesystems.com>
Cc: "Mattias Rönnblom" <hofors@lysator.liu.se>,
"Stephen Hemminger" <stephen@networkplumber.org>,
dev@dpdk.org, david.marchand@redhat.com,
mattias.ronnblom@ericsson.com, bruce.richardson@intel.com,
olivier.matz@6wind.com, andrew.rybchenko@oktetlabs.ru,
honnappa.nagarahalli@arm.com, konstantin.v.ananyev@yandex.ru
Subject: Re: [PATCH] eal: add cache guard to per-lcore PRNG state
Date: Thu, 12 Oct 2023 00:49:03 +0200 [thread overview]
Message-ID: <2624731.k3LOHGUjKi@thomas> (raw)
In-Reply-To: <98CBD80474FA8B44BF855DF32C47DC35E9EF2B@smartserver.smartshare.dk>
11/10/2023 18:55, Morten Brørup:
> > From: Thomas Monjalon [mailto:thomas@monjalon.net]
> > Sent: Wednesday, 11 October 2023 18.08
> >
> > TLS is an alternative solution proposed by Stephen.
> > What do you think?
>
> I think we went down a rabbit hole - which I admit to enjoy. :-)
There is no reply/explanation in this thread.
> My simple patch should be applied, with the description improved by Mattias:
>
> The per-lcore random state is frequently updated by their individual
> lcores, so add a cache guard to prevent false sharing in case the
> CPU employs a next-N-lines (or similar) hardware prefetcher.
OK applied
next prev parent reply other threads:[~2023-10-11 22:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-04 9:26 Morten Brørup
2023-09-04 11:57 ` Mattias Rönnblom
2023-09-06 16:25 ` Stephen Hemminger
2023-10-11 16:07 ` Thomas Monjalon
2023-10-11 16:55 ` Morten Brørup
2023-10-11 22:49 ` Thomas Monjalon [this message]
2023-10-11 20:41 ` Mattias Rönnblom
2023-09-29 18:55 ` Morten Brørup
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