From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 00E53A04A5; Wed, 17 Jun 2020 10:13:41 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E04D41252; Wed, 17 Jun 2020 10:13:40 +0200 (CEST) Received: from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com [66.111.4.26]) by dpdk.org (Postfix) with ESMTP id 796B71150 for ; Wed, 17 Jun 2020 10:13:39 +0200 (CEST) Received: from compute7.internal (compute7.nyi.internal [10.202.2.47]) by mailout.nyi.internal (Postfix) with ESMTP id 1343D5C011D; Wed, 17 Jun 2020 04:13:39 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute7.internal (MEProxy); Wed, 17 Jun 2020 04:13:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= zLf7Qg/MxApxEJxoQYID65X09N1Ca9CC07SnsfBXvD0=; b=CjDLFRfX5JOLFP+W /ADdcP+MCRXaMKBdb8GAsjIJZrxYFAqUsxWqqOriEEvUD/kkWUF9TirRif3XH5iq lnO7TWump5/COmrGXbkPYNjbzwy6abTDZHlJBW1NUHBuqIOIlR/vLn4wamuDoCTU c8Jta6g30BnrsvYGkE5GNoFXbDNTrmrgoZMei5VgJHLTD6mFRJFGITgdELDCR4b/ FpVqLI+LRT3fDK7NNHaZTREcpvbhQXwhbsgFr7jjQoLqQW12DNB2bAvrvOO5ZGCK uhQ4SwznAH2QvIM3k79aI78SKR1ulFEZQQ+C+qZsWQtHUbS7Z08aZnNYFfMKwBI5 3ZY0cw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=zLf7Qg/MxApxEJxoQYID65X09N1Ca9CC07SnsfBXv D0=; b=HXNdgfoffgc+0Yc20UfGJFTpcZhZrtyE7NApPJ7onE7TjHddXQblMK8jE Uu9QeS31vToHur/CNH4YkywJVAVk2ddpRXg1isTQotY8QKj0SEyF7Cn4NI6XBiYH QP7jW5zVBXB9VaZ9bRDrcw8bpl4etnvdfaZrcnPBK3dldF7PsaKhd1cxOYHjVIa/ PSLMetb6bYWn/tDPAjZ+SOnypmUnTyEvOLwjE/lmCnWRHfUbg0V/W/Aq2YIw2hEx XTI/QHvig9Ob0AeJremLdZw3Lzin3VteWyaF6v1HBxVr/AeE2ioQkuF8iJycsNlH 3mF9Ph0Gvl0v3m5kfZ2thtEIXlhlw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduhedrudejvddgtdefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkfgjfhgggfgtsehtqhertddttddunecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepfeegffeihfeftedthfdvgfetkeffffdukeevtdevtddvgfevuedu veegvdeggedtnecukfhppeejjedrudefgedrvddtfedrudekgeenucevlhhushhtvghruf hiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehthhhomhgrshesmhhonhhjrghl ohhnrdhnvght X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id BF0B8328005D; Wed, 17 Jun 2020 04:13:37 -0400 (EDT) From: Thomas Monjalon To: Parav Pandit , =?ISO-8859-1?Q?Ga=EBtan?= Rivet Cc: dev@dpdk.org, ferruh.yigit@intel.com, orika@mellanox.com, matan@mellanox.com Date: Wed, 17 Jun 2020 10:13:35 +0200 Message-ID: <2695586.TfsyjlpMEJ@thomas> In-Reply-To: <20200615210042.gblrdp6rus6exooy@u256.net> References: <20200610171728.89-1-parav@mellanox.com> <20200610171728.89-5-parav@mellanox.com> <20200615210042.gblrdp6rus6exooy@u256.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-1" Subject: Re: [dpdk-dev] [RFC PATCH 4/6] bus/mlx5_pci: add mlx5 PCI bus X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 15/06/2020 23:00, Ga=EBtan Rivet: > On 10/06/20 17:17 +0000, Parav Pandit wrote: > > +# DEBUG which is usually provided on the command-line may enable > > +# CONFIG_RTE_LIBRTE_MLX5_DEBUG. > > +ifeq ($(DEBUG),1) > > +CONFIG_RTE_LIBRTE_MLX5_DEBUG :=3D y > > +endif > > + > > +# User-defined CFLAGS. > > +ifeq ($(CONFIG_RTE_LIBRTE_MLX5_DEBUG),y) > > +CFLAGS +=3D -pedantic > > +ifneq ($(CONFIG_RTE_TOOLCHAIN_ICC),y) > > +CFLAGS +=3D -DPEDANTIC > > +endif > > +AUTO_CONFIG_CFLAGS +=3D -Wno-pedantic > > +else > > +CFLAGS +=3D -UPEDANTIC > > +endif > > + >=20 > At this point why not define some > $(RTE_SDK)/drivers/common/mlx5/mlx5_common.mk >=20 > That should be included by vdpa, mlx5, this one? > This would force-align flag behavior, this is becoming untidy. >=20 > (Make is disappearing soon I heard, but still.) Yes makefiles will be removed in 2 months. Please do not move makefiles at this point. [...] > > +/** > > + * A structure describing a mlx5 pci driver. > > + */ > > +struct rte_mlx5_pci_driver { >=20 > A note on the namespace: rte_mlx5_pci seems heavy. > Do you expect other types of "super-driver", other than PCI? > Wouldn't rte_mlx5_driver be ok for example? >=20 > > + enum mlx5_class dev_class; /**< Class of this driver */ > > + struct rte_driver driver; /**< Inherit core driver. */ > > + pci_probe_t *probe; /**< Class device probe function. */ > > + pci_remove_t *remove; /**< Class device remove function. */ > > + pci_dma_map_t *dma_map; /**< Class device dma map function. */ > > + pci_dma_unmap_t *dma_unmap; /**< Class device dma unmap function. */ > > + TAILQ_ENTRY(rte_mlx5_pci_driver) next; > > + const struct rte_pci_id *id_table; /**< ID table, NULL terminated. */ >=20 > At this point, why not inherit an rte_pci_driver instead of the core > rte_driver? I agree we expect inheriting rte_pci_driver.