From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id 77A7F7C97 for ; Sun, 30 Apr 2017 23:10:19 +0200 (CEST) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 1683B20761; Sun, 30 Apr 2017 17:10:19 -0400 (EDT) Received: from frontend1 ([10.202.2.160]) by compute1.internal (MEProxy); Sun, 30 Apr 2017 17:10:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc:x-sasl-enc; s=mesmtp; bh=T+eRSAa5nwMpVD1 DRyPAViulKJbQV8RWDhsXCt8/6H4=; b=Zi3NussT65BMXdUXRF/Gu0N3ifqsKSW gNsQwZ0I8PhXe+hOxFZOYNt6IwtDzOs7ACcefHnIVJphoJI0qfeWKwesAbEbcgfs dQoEJqX6k4b2dcvruNn7zG8+ikwkexe7DGUh5GOglPU/62vImRfEIdmbyyyIzEeN lbdJmI8YoBnc= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s= fm1; bh=T+eRSAa5nwMpVD1DRyPAViulKJbQV8RWDhsXCt8/6H4=; b=fy0jr6PM jfTQn01dGSjVbYkw+D7ruL98qAN9izbg7wB9mCRU2aPnzhVO5l0PS33qMFsuqOIR 4EJ6puo8iSzgWg7+OSc33NhG+gds4AmmXJecfEgQ13JDVb05z6nyFZmwm+kFBMyk VedNzC6MItq3+jxylf7eepjXDw/mWtdyJGV4qBRg+kuBc+knUc6P+3q6iQG/cMfR eiHqUKOEzlBOF3XcTkqo2iLTXYuuc41he8ppnGPLytan3PKQkZ5+8YbiKhLPQv7W tilx0QXf/5TeXH+QOYiXQJbaGnCbRLv9VSeeCuMtlEAfSXxDKfhXJCzBxUTuz405 AzDoyKEp9u1IFQ== X-ME-Sender: X-Sasl-enc: w8EwwMZL/fV/2nA7V9wo8r2FaUaH5rRD9rHejdc8XPtL 1493586618 Received: from xps.localnet (245.114.118.80.rev.sfr.net [80.118.114.245]) by mail.messagingengine.com (Postfix) with ESMTPA id 985E17E267; Sun, 30 Apr 2017 17:10:18 -0400 (EDT) From: Thomas Monjalon To: Jerin Jacob Cc: dev@dpdk.org, Jianbo Liu , Hemant Agrawal , christian.ehrhardt@canonical.com Date: Sun, 30 Apr 2017 23:10:16 +0200 Message-ID: <2751948.JIQzdyJ0NR@xps> In-Reply-To: References: <20170426162919.15397-1-jerin.jacob@caviumnetworks.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH] config: set cache line as 128B in the generic arm64 config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 30 Apr 2017 21:10:19 -0000 28/04/2017 04:14, Jianbo Liu: > On 27 April 2017 at 00:29, Jerin Jacob wrote: > > armv8 implementations may have 64B or 128B cache line. > > Setting to the maximum available cache line size in generic config to > > address minimum DMA alignment across all arm64 implementations. > > > > Increasing the cacheline size has no negative impact to cache invalidation > > on systems with a smaller cache line. > > > > The need for the minimum DMA alignment has impact on functional aspects > > of the platform so default config should cater the functional aspects. > > > > There is an impact on memory usage with this scheme, but that's not too > > important for the single image arm64 distribution use case. > > > > The arm64 linux kernel followed the similar approach for single > > arm64 image use case. > > http://lxr.free-electrons.com/source/arch/arm64/include/asm/cache.h > > > > Signed-off-by: Jerin Jacob > > Acked-by: Jianbo Liu Applied, thanks