* [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson
@ 2018-12-11 3:55 Gavin Hu
2018-12-11 6:02 ` Honnappa Nagarahalli
0 siblings, 1 reply; 5+ messages in thread
From: Gavin Hu @ 2018-12-11 3:55 UTC (permalink / raw)
To: dev
Cc: thomas, jerin.jacob, hemant.agrawal, Honnappa.Nagarahalli,
gavin.hu, stable
This patch makes the configuration based on makefile and the
configuration based on meson to be the same.
Fixes: c6e536e38437 ("build: add more implementers IDs and PNs for ARM")
Cc: stable@dpdk.org
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <Ruifeng.Wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
---
config/arm/meson.build | 3 +++
1 file changed, 3 insertions(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 3f91725..dae55d6 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -47,6 +47,7 @@ flags_common_default = [
flags_generic = [
['RTE_MACHINE', '"armv8a"'],
['RTE_MAX_LCORE', 256],
+ ['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 128]]
flags_cavium = [
['RTE_MACHINE', '"thunderx"'],
@@ -57,11 +58,13 @@ flags_cavium = [
['RTE_USE_C11_MEM_MODEL', false]]
flags_dpaa = [
['RTE_MACHINE', '"dpaa"'],
+ ['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
['RTE_MAX_NUMA_NODES', 1],
['RTE_MAX_LCORE', 16]]
flags_dpaa2 = [
['RTE_MACHINE', '"dpaa2"'],
+ ['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
['RTE_MAX_NUMA_NODES', 1],
['RTE_MAX_LCORE', 16],
--
2.7.4
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson
2018-12-11 3:55 [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson Gavin Hu
@ 2018-12-11 6:02 ` Honnappa Nagarahalli
2018-12-12 10:13 ` Bruce Richardson
0 siblings, 1 reply; 5+ messages in thread
From: Honnappa Nagarahalli @ 2018-12-11 6:02 UTC (permalink / raw)
To: Gavin Hu (Arm Technology China), dev
Cc: thomas, jerin.jacob, hemant.agrawal,
Gavin Hu (Arm Technology China),
stable, Bruce Richardson, nd, nd
+ Bruce
> -----Original Message-----
> From: Gavin Hu <gavin.hu@arm.com>
> Sent: Monday, December 10, 2018 9:56 PM
> To: dev@dpdk.org
> Cc: thomas@monjalon.net; jerin.jacob@caviumnetworks.com;
> hemant.agrawal@nxp.com; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Gavin Hu (Arm Technology China)
> <Gavin.Hu@arm.com>; stable@dpdk.org
> Subject: [PATCH v1] config: enable c11 memory model for ARMv8 meson
>
> This patch makes the configuration based on makefile and the configuration
> based on meson to be the same.
>
> Fixes: c6e536e38437 ("build: add more implementers IDs and PNs for ARM")
> Cc: stable@dpdk.org
>
> Signed-off-by: Gavin Hu <gavin.hu@arm.com>
> Reviewed-by: Ruifeng Wang <Ruifeng.Wang@arm.com>
> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> ---
> config/arm/meson.build | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> 3f91725..dae55d6 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -47,6 +47,7 @@ flags_common_default = [ flags_generic = [
> ['RTE_MACHINE', '"armv8a"'],
> ['RTE_MAX_LCORE', 256],
> + ['RTE_USE_C11_MEM_MODEL', true],
> ['RTE_CACHE_LINE_SIZE', 128]]
> flags_cavium = [
> ['RTE_MACHINE', '"thunderx"'],
> @@ -57,11 +58,13 @@ flags_cavium = [
> ['RTE_USE_C11_MEM_MODEL', false]]
> flags_dpaa = [
> ['RTE_MACHINE', '"dpaa"'],
> + ['RTE_USE_C11_MEM_MODEL', true],
> ['RTE_CACHE_LINE_SIZE', 64],
> ['RTE_MAX_NUMA_NODES', 1],
> ['RTE_MAX_LCORE', 16]]
> flags_dpaa2 = [
> ['RTE_MACHINE', '"dpaa2"'],
> + ['RTE_USE_C11_MEM_MODEL', true],
> ['RTE_CACHE_LINE_SIZE', 64],
> ['RTE_MAX_NUMA_NODES', 1],
> ['RTE_MAX_LCORE', 16],
> --
> 2.7.4
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson
2018-12-11 6:02 ` Honnappa Nagarahalli
@ 2018-12-12 10:13 ` Bruce Richardson
2018-12-18 23:36 ` Thomas Monjalon
0 siblings, 1 reply; 5+ messages in thread
From: Bruce Richardson @ 2018-12-12 10:13 UTC (permalink / raw)
To: Honnappa Nagarahalli
Cc: Gavin Hu (Arm Technology China),
dev, thomas, jerin.jacob, hemant.agrawal, stable, nd
On Tue, Dec 11, 2018 at 06:02:01AM +0000, Honnappa Nagarahalli wrote:
> + Bruce
>
> > -----Original Message-----
> > From: Gavin Hu <gavin.hu@arm.com>
> > Sent: Monday, December 10, 2018 9:56 PM
> > To: dev@dpdk.org
> > Cc: thomas@monjalon.net; jerin.jacob@caviumnetworks.com;
> > hemant.agrawal@nxp.com; Honnappa Nagarahalli
> > <Honnappa.Nagarahalli@arm.com>; Gavin Hu (Arm Technology China)
> > <Gavin.Hu@arm.com>; stable@dpdk.org
> > Subject: [PATCH v1] config: enable c11 memory model for ARMv8 meson
> >
> > This patch makes the configuration based on makefile and the configuration
> > based on meson to be the same.
> >
> > Fixes: c6e536e38437 ("build: add more implementers IDs and PNs for ARM")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Gavin Hu <gavin.hu@arm.com>
> > Reviewed-by: Ruifeng Wang <Ruifeng.Wang@arm.com>
> > Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> > ---
I see no issues with this, it's just setting flags for arm platforms.
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson
2018-12-12 10:13 ` Bruce Richardson
@ 2018-12-18 23:36 ` Thomas Monjalon
2018-12-19 5:11 ` Honnappa Nagarahalli
0 siblings, 1 reply; 5+ messages in thread
From: Thomas Monjalon @ 2018-12-18 23:36 UTC (permalink / raw)
To: Gavin Hu (Arm Technology China)
Cc: dev, Bruce Richardson, Honnappa Nagarahalli, jerin.jacob,
hemant.agrawal, stable, nd
12/12/2018 11:13, Bruce Richardson:
> On Tue, Dec 11, 2018 at 06:02:01AM +0000, Honnappa Nagarahalli wrote:
> > + Bruce
> >
> > From: Gavin Hu <gavin.hu@arm.com>
> > >
> > > This patch makes the configuration based on makefile and the configuration
> > > based on meson to be the same.
> > >
> > > Fixes: c6e536e38437 ("build: add more implementers IDs and PNs for ARM")
> > > Cc: stable@dpdk.org
> > >
> > > Signed-off-by: Gavin Hu <gavin.hu@arm.com>
> > > Reviewed-by: Ruifeng Wang <Ruifeng.Wang@arm.com>
> > > Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> > > ---
>
> I see no issues with this, it's just setting flags for arm platforms.
>
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Applied, thanks.
Note: according to the wording explained by Honnappa,
I change ARMv8 to armv8 in the title.
Please apply the official spelling in your updates, thanks.
https://mails.dpdk.org/archives/dev/2018-October/115174.html
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson
2018-12-18 23:36 ` Thomas Monjalon
@ 2018-12-19 5:11 ` Honnappa Nagarahalli
0 siblings, 0 replies; 5+ messages in thread
From: Honnappa Nagarahalli @ 2018-12-19 5:11 UTC (permalink / raw)
To: Thomas Monjalon, Gavin Hu (Arm Technology China)
Cc: dev, Bruce Richardson, jerin.jacob, hemant.agrawal, stable, nd, nd
> >
> > I see no issues with this, it's just setting flags for arm platforms.
> >
> > Acked-by: Bruce Richardson <bruce.richardson@intel.com>
>
> Applied, thanks.
>
> Note: according to the wording explained by Honnappa, I change ARMv8 to
> armv8 in the title.
> Please apply the official spelling in your updates, thanks.
> https://mails.dpdk.org/archives/dev/2018-October/115174.html
Thank you, we will try to catch more of these in internal reviews.
>
^ permalink raw reply [flat|nested] 5+ messages in thread
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2018-12-11 3:55 [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson Gavin Hu
2018-12-11 6:02 ` Honnappa Nagarahalli
2018-12-12 10:13 ` Bruce Richardson
2018-12-18 23:36 ` Thomas Monjalon
2018-12-19 5:11 ` Honnappa Nagarahalli
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