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Wed, 15 Jul 2020 13:26:19 -0400 (EDT) From: Thomas Monjalon To: Ori Kam Cc: jerinj@marvell.com, xiang.w.wang@intel.com, matan@mellanox.com, viacheslavo@mellanox.com, Shahaf Shuler , dev@dpdk.org, guyk@marvell.com, dev@dpdk.org, pbhagavatula@marvell.com, hemant.agrawal@nxp.com, opher@mellanox.com, alexr@mellanox.com, dovrat@marvell.com, pkapoor@marvell.com, nipun.gupta@nxp.com, bruce.richardson@intel.com, yang.a.hong@intel.com, harry.chang@intel.com, gu.jian1@zte.com.cn, shanjiangh@chinatelecom.cn, zhangy.yun@chinatelecom.cn, lixingfu@huachentel.com, wushuai@inspur.com, yuyingxia@yxlink.com, fanchenggang@sunyainfo.com, davidfgao@tencent.com, liuzhong1@chinaunicom.cn, zhaoyong11@huawei.com, oc@yunify.com, jim@netgate.com, hongjun.ni@intel.com, deri@ntop.org, fc@napatech.com, arthur.su@lionic.com, rasland@mellanox.com, Yuval Avnery Date: Wed, 15 Jul 2020 19:26:18 +0200 Message-ID: <2805180.1ZHrk7HxAW@thomas> In-Reply-To: <1594587541-110442-6-git-send-email-orika@mellanox.com> References: <1593941027-86651-1-git-send-email-orika@mellanox.com> <1594587541-110442-1-git-send-email-orika@mellanox.com> <1594587541-110442-6-git-send-email-orika@mellanox.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v2 05/20] common/mlx5: add support for regex capability query X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 12/07/2020 22:58, Ori Kam: > From: Yuval Avnery > > Update hca cap struct and common query hca cap function. > > Signed-off-by: Yuval Avnery > Acked-by: Viacheslav Ovsiienko > > --- > drivers/common/mlx5/mlx5_devx_cmds.c | 3 +++ > drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++ > drivers/common/mlx5/mlx5_prm.h | 9 +++++++-- > 3 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c > index 2179a83..54b20a7 100644 > --- a/drivers/common/mlx5/mlx5_devx_cmds.c > +++ b/drivers/common/mlx5/mlx5_devx_cmds.c > @@ -467,6 +467,9 @@ struct mlx5_devx_obj * > attr->vdpa.queue_counters_valid = !!(MLX5_GET64(cmd_hca_cap, hcattr, > general_obj_types) & > MLX5_GENERAL_OBJ_TYPES_CAP_VIRTIO_Q_COUNTERS); > + attr->regex = MLX5_GET(cmd_hca_cap, hcattr, regexp); > + attr->regexp_num_of_engines = MLX5_GET(cmd_hca_cap, hcattr, > + regexp_num_of_engines); > if (attr->qos.sup) { > MLX5_SET(query_hca_cap_in, in, op_mod, > MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP | > diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h > index 25704ef..bb14ca5 100644 > --- a/drivers/common/mlx5/mlx5_devx_cmds.h > +++ b/drivers/common/mlx5/mlx5_devx_cmds.h > @@ -90,6 +90,8 @@ struct mlx5_hca_attr { > uint32_t vhca_id:16; > uint32_t relaxed_ordering_write:1; > uint32_t relaxed_ordering_read:1; > + uint32_t regex:1; > + uint32_t regexp_num_of_engines; > struct mlx5_hca_qos_attr qos; > struct mlx5_hca_vdpa_attr vdpa; > }; > diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h > index ede7810..bfbc58b 100644 > --- a/drivers/common/mlx5/mlx5_prm.h > +++ b/drivers/common/mlx5/mlx5_prm.h > @@ -1034,9 +1034,14 @@ struct mlx5_ifc_cmd_hca_cap_bits { > u8 log_max_qp_sz[0x8]; > u8 reserved_at_90[0xb]; > u8 log_max_qp[0x5]; > - u8 reserved_at_a0[0xb]; > + u8 regexp[0x1]; > + u8 reserved_at_a1[0x3]; > + u8 regexp_num_of_engines[0x4]; > + u8 reserved_at_a8[0x3]; > u8 log_max_srq[0x5]; > - u8 reserved_at_b0[0x10]; > + u8 reserved_at_b0[0x3]; > + u8 regexp_log_crspace_size[0x5]; > + u8 reserved_at_b8[0x8]; > u8 reserved_at_c0[0x8]; > u8 log_max_cq_sz[0x8]; > u8 reserved_at_d0[0xb]; Really I don't see any meaning in this patch. Detail: Why using u8 instead of uint8_t?