From: Thomas Monjalon <thomas@monjalon.net>
To: Damodharam Ammepalli <damodharam.ammepalli@broadcom.com>,
huangdengdui <huangdengdui@huawei.com>
Cc: Ferruh Yigit <ferruh.yigit@amd.com>,
dev@dpdk.org, aman.deep.singh@intel.com, yuying.zhang@intel.com,
andrew.rybchenko@oktetlabs.ru, liuyonglong@huawei.com,
fengchengwen@huawei.com, haijie1@huawei.com,
lihuisong@huawei.com
Subject: Re: [PATCH 0/3] support setting lanes
Date: Thu, 21 Mar 2024 09:28:54 +0100 [thread overview]
Message-ID: <28052301.gRfpFWEtPU@thomas> (raw)
In-Reply-To: <21ed4b3f-348b-4cf8-91d3-8d42874d7d35@huawei.com>
21/03/2024 03:02, huangdengdui:
>
> On 2024/3/20 20:31, Ferruh Yigit wrote:
> > On 3/18/2024 9:26 PM, Damodharam Ammepalli wrote:
> >> On Mon, Mar 18, 2024 at 7:56 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> >>>
> >>> 12/03/2024 08:52, Dengdui Huang:
> >>>> Some speeds can be achieved with different number of lanes. For example,
> >>>> 100Gbps can be achieved using two lanes of 50Gbps or four lanes of 25Gbps.
> >>>> When use different lanes, the port cannot be up.
> >>>
> >>> I'm not sure what you are referring to.
> >>> I suppose it is not PCI lanes.
> >>> Please could you link to an explanation of how a port is split in lanes?
> >>> Which hardware does this?
> >>>
> >> This is a snapshot of 100Gb that the latest BCM576xx supports.
> >> 100Gb (NRZ: 25G per lane, 4 lanes) link speed
> >> 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed
> >> 100Gb (PAM4-112: 100G per lane, 1 lane) link speed
> >>
> >> Let the user feed in lanes=< integer value> and the NIC driver decides
> >> the matching combination speed x lanes that works. In future if a new speed
> >> is implemented with more than 8 lanes, there wouldn't be a need
> >> to touch this speed command. Using separate lane command would
> >> be a better alternative to support already shipped products and only new
> >> drivers would consider this lanes configuration, if applicable.
> >>
> >
> > As far as I understand, lane is related to the physical layer of the
> > NIC, there are multiple copies of transmitter, receiver, modulator HW
> > block and each set called as a 'lane' and multiple lanes work together
> > to achieve desired speed. (please correct me if this is wrong).
> >
> > Why not just configuring the speed is not enough? Why user needs to know
> > the detail and configuration of the lanes?
> > Will it work if driver/device configure the "speed x lane" internally
> > for the requested speed?
> >
> > Is there a benefit to force specific lane count for a specific speed
> > (like power optimization, just a wild guess)?
> >
> >
> > And +1 for auto-negotiation if possible.
>
> As you said above,,multiple lanes work together to achieve desired speed.
> For example, the following solutions can be used to implement 100G:
> 1、Combines four 25G lanes
> 2、Combines two 50G lanes
> 3、A single 100G lane
>
> It is assumed that two ports are interconnected and the two ports support
> the foregoing three solutions. But, we just configured the speed to 100G and
> one port uses four 25G lanes by default and the other port uses two 50G lanes
> by default, the port cannot be up. In this case, we need to configure the
> two ports to use the same solutions (for example, uses two 50G lanes)
> so that the ports can be up.
Why this config is not OK? How do we know?
Really I have a very bad feeling about this feature.
next prev parent reply other threads:[~2024-03-21 8:29 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-12 7:52 Dengdui Huang
2024-03-12 7:52 ` [PATCH 1/3] ethdev: " Dengdui Huang
2024-03-19 3:02 ` Stephen Hemminger
2024-03-20 1:16 ` huangdengdui
2024-03-12 7:52 ` [PATCH 2/3] net/hns3: " Dengdui Huang
2024-03-12 7:52 ` [PATCH 3/3] app/testpmd: " Dengdui Huang
2024-03-15 21:47 ` Damodharam Ammepalli
2024-03-19 2:38 ` huangdengdui
2024-03-22 7:09 ` [PATCH v2 0/6] " Dengdui Huang
2024-03-22 7:09 ` [PATCH v2 1/6] ethdev: " Dengdui Huang
2024-03-22 13:58 ` Thomas Monjalon
2024-03-22 15:15 ` Ajit Khaparde
2024-03-22 17:32 ` Tyler Retzlaff
2024-03-22 22:30 ` Damodharam Ammepalli
2024-03-25 6:24 ` huangdengdui
2024-03-25 9:30 ` Thomas Monjalon
2024-03-25 21:14 ` Damodharam Ammepalli
2024-03-26 1:42 ` lihuisong (C)
2024-03-26 3:45 ` Ajit Khaparde
2024-03-26 10:30 ` Thomas Monjalon
2024-03-26 11:15 ` lihuisong (C)
2024-03-26 13:47 ` Ajit Khaparde
2024-03-26 18:11 ` Ajit Khaparde
2024-03-26 18:21 ` Damodharam Ammepalli
2024-03-30 11:38 ` huangdengdui
2024-04-01 20:07 ` Thomas Monjalon
2024-04-01 22:29 ` Damodharam Ammepalli
2024-05-22 20:44 ` Ferruh Yigit
2024-04-02 8:37 ` huangdengdui
2024-04-02 15:28 ` Stephen Hemminger
2024-04-04 13:45 ` Ferruh Yigit
2024-03-29 3:25 ` lihuisong (C)
2024-03-22 7:09 ` [PATCH v2 2/6] test: updated UT for " Dengdui Huang
2024-03-22 7:09 ` [PATCH v2 3/6] ethdev: add function to parse link mode info Dengdui Huang
2024-03-22 7:09 ` [PATCH v2 4/6] net/hns3: use parse link mode info function Dengdui Huang
2024-03-22 7:09 ` [PATCH v2 5/6] net/hns3: support setting lanes Dengdui Huang
2024-03-22 7:09 ` [PATCH v2 6/6] app/testpmd: " Dengdui Huang
2024-04-04 13:58 ` [PATCH v2 0/6] " Ferruh Yigit
2024-05-16 12:48 ` huangdengdui
2024-05-22 20:49 ` Ferruh Yigit
2024-03-18 14:56 ` [PATCH 0/3] " Thomas Monjalon
2024-03-18 21:26 ` Damodharam Ammepalli
2024-03-18 21:42 ` Stephen Hemminger
2024-03-18 22:55 ` Ajit Khaparde
2024-03-20 11:41 ` Thomas Monjalon
2024-03-20 12:31 ` Ferruh Yigit
2024-03-21 2:02 ` huangdengdui
2024-03-21 8:28 ` Thomas Monjalon [this message]
2024-03-22 2:28 ` huangdengdui
2024-03-22 4:38 ` Jerin Jacob
2024-03-22 5:25 ` Ajit Khaparde
2024-03-22 5:51 ` Jerin Jacob
2024-03-22 13:51 ` Thomas Monjalon
2024-03-25 14:04 ` Jerin Jacob
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