From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id E55F5548B for ; Thu, 22 Jun 2017 11:28:36 +0200 (CEST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP; 22 Jun 2017 02:28:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,372,1493708400"; d="scan'208";a="116135625" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga005.jf.intel.com with ESMTP; 22 Jun 2017 02:28:34 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 22 Jun 2017 02:28:34 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 22 Jun 2017 02:28:34 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.116]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.122]) with mapi id 14.03.0319.002; Thu, 22 Jun 2017 17:28:32 +0800 From: "Chang, Cunyin" To: Stephen Hemminger , "dev@dpdk.org" CC: Stephen Hemminger Thread-Topic: [dpdk-dev] [PATCH 2/3] eal: PCI domain should be 32 bits Thread-Index: AQHS6qyWZKTqhZpoWUeorTUcdVX5Z6Iwlx/Q Date: Thu, 22 Jun 2017 09:28:31 +0000 Message-ID: <2BFA8F2383C3784C90698C10BC0963195EEEF678@SHSMSX103.ccr.corp.intel.com> References: <20170621163545.25713-1-stephen@networkplumber.org> <20170621163545.25713-3-stephen@networkplumber.org> In-Reply-To: <20170621163545.25713-3-stephen@networkplumber.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNGQ0NzBmYzYtMzhlMS00NTU1LWExOWMtMGEzZGViNjRhYWMzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6Im9EamtYNG5IYmR3eElhZ3VEUGFHQU9NS0NDaHVITmYxV2lGRDhZNm94Mm89In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 2/3] eal: PCI domain should be 32 bits X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Jun 2017 09:28:38 -0000 I think the series patches does not cover all area which need to adapt to u= 32 PCI domain, We still need some other work to do: we need define another macro such as PCI_PRI_FMT. Something like: #define PCI_XXX_PRI_FMT "%.5" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8 PCI_PRI_STR_SIZE also need to be modified: #define PCI_PRI_STR_SIZE sizeof("XXXXX:XX:XX.X") The macro PCI_PRI_FMT will not works if The domain exceed 16bits. It will impact the following functions: 1 RTE_LOG function, there a lots of RTE_LOG such as: RTE_LOG(WARNING, EAL, "Requested device " PCI_PRI_FMT " cannot be used\n", addr->domain, addr->bus, addr->devid, addr->function); 2 pci_dump_one_device(). 3 rte_eal_pci_device_name() 4 pci_update_device() 5 pci_ioport_map() 6 pci_get_uio_dev() 7 pci_uio_map_resource_by_index() 8 pci_uio_ioport_map() 9 pci_vfio_map_resource() 10 pci_vfio_unmap_resource() All the above functions will related with the macro PCI_PRI_FMT, so I think= they need to be modified too. There are some other code need modify: In function rte_eal_compare_pci_addr(), we need do the following work: dev_addr =3D ((uint64_t)addr->domain << 24) | ((uint64_t)addr->bus << 16) | ((uint64_t)addr->devid << 8) | (uint64_t)addr->function; dev_addr2 =3D ((uint64_t)addr2->domain << 24) | ((uint64_t)addr2->bus << 16= ) | ((uint64_t)addr2->devid << 8) | (uint64_t)addr2->function; In function eal_parse_pci_BDF(), we need do the following work: GET_PCIADDR_FIELD(input, dev_addr->domain, UINT32_MAX, ':'); > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Stephen > Hemminger > Sent: Thursday, June 22, 2017 12:36 AM > To: dev@dpdk.org > Cc: Stephen Hemminger ; Stephen > Hemminger > Subject: [dpdk-dev] [PATCH 2/3] eal: PCI domain should be 32 bits >=20 > In some environments, the PCI domain can be larger than 16 bits. > For example, a PCI device passed through in Azure gets a synthetic domain= id > which is internally generated based on GUID. The PCI standard does not > restrict domain to be 16 bits. >=20 > This change breaks ABI for API's that expose PCI address structure. >=20 > Signed-off-by: Stephen Hemminger > --- > lib/librte_eal/common/include/rte_pci.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/lib/librte_eal/common/include/rte_pci.h > b/lib/librte_eal/common/include/rte_pci.h > index 0284a6208aa5..8b549aadfbe6 100644 > --- a/lib/librte_eal/common/include/rte_pci.h > +++ b/lib/librte_eal/common/include/rte_pci.h > @@ -112,7 +112,7 @@ struct rte_pci_id { > * A structure describing the location of a PCI device. > */ > struct rte_pci_addr { > - uint16_t domain; /**< Device domain */ > + uint32_t domain; /**< Device domain */ > uint8_t bus; /**< Device bus */ > uint8_t devid; /**< Device ID */ > uint8_t function; /**< Device function. */ > -- > 2.11.0