From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
To: <dev@dpdk.org>
Cc: <anoobj@marvell.com>, Akhil Goyal <gakhil@marvell.com>,
Fan Zhang <fanzhang.oss@gmail.com>,
Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Subject: [PATCH v1 2/4] crypto/cnxk: use generic EC opcodes
Date: Thu, 26 Oct 2023 13:45:10 +0530 [thread overview]
Message-ID: <2b4e2e189aed1dba8de03742b752267f9e9ad973.1698307299.git.gmuthukrishn@marvell.com> (raw)
In-Reply-To: <cover.1698307299.git.gmuthukrishn@marvell.com>
Use generic EC opcodes for sign and verify ops in ECDSA and SM2
implementations.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
---
drivers/common/cnxk/roc_ae.h | 14 +++++++---
drivers/crypto/cnxk/cnxk_ae.h | 50 +++++++++++++++++++----------------
2 files changed, 38 insertions(+), 26 deletions(-)
diff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h
index d459c5e680..eaf12ab254 100644
--- a/drivers/common/cnxk/roc_ae.h
+++ b/drivers/common/cnxk/roc_ae.h
@@ -5,9 +5,11 @@
#ifndef __ROC_AE_H__
#define __ROC_AE_H__
+#include "roc_platform.h"
+
/* AE opcodes */
#define ROC_AE_MAJOR_OP_MODEX 0x03
-#define ROC_AE_MAJOR_OP_ECDSA 0x04
+#define ROC_AE_MAJOR_OP_EC 0x04
#define ROC_AE_MAJOR_OP_ECC 0x05
#define ROC_AE_MINOR_OP_MODEX 0x01
#define ROC_AE_MINOR_OP_PKCS_ENC 0x02
@@ -15,8 +17,8 @@
#define ROC_AE_MINOR_OP_PKCS_DEC 0x04
#define ROC_AE_MINOR_OP_PKCS_DEC_CRT 0x05
#define ROC_AE_MINOR_OP_MODEX_CRT 0x06
-#define ROC_AE_MINOR_OP_ECDSA_SIGN 0x01
-#define ROC_AE_MINOR_OP_ECDSA_VERIFY 0x02
+#define ROC_AE_MINOR_OP_EC_SIGN 0x01
+#define ROC_AE_MINOR_OP_EC_VERIFY 0x02
#define ROC_AE_MINOR_OP_ECC_UMP 0x03
#define ROC_AE_MINOR_OP_ECC_FPM 0x04
@@ -38,6 +40,12 @@ typedef enum {
ROC_AE_EC_ID_PMAX
} roc_ae_ec_id;
+/* EC param1 fields */
+#define ROC_AE_EC_PARAM1_ECDSA (0 << 7)
+#define ROC_AE_EC_PARAM1_SM2 (1 << 7)
+#define ROC_AE_EC_PARAM1_NIST (0 << 6)
+#define ROC_AE_EC_PARAM1_NONNIST (1 << 6)
+
/* Prime and order fields of built-in elliptic curves */
struct roc_ae_ec_group {
struct {
diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index 09468d58b0..6e61ccb0c5 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -588,8 +588,8 @@ cnxk_ae_ecdsa_sign_prep(struct rte_crypto_ecdsa_op_param *ecdsa,
dptr += p_align;
/* Setup opcodes */
- w4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;
- w4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_SIGN;
+ w4.s.opcode_major = ROC_AE_MAJOR_OP_EC;
+ w4.s.opcode_minor = ROC_AE_MINOR_OP_EC_SIGN;
w4.s.param1 = curveid | (message_len << 8);
w4.s.param2 = (p_align << 8) | k_len;
@@ -683,8 +683,8 @@ cnxk_ae_ecdsa_verify_prep(struct rte_crypto_ecdsa_op_param *ecdsa,
dptr += p_align;
/* Setup opcodes */
- w4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;
- w4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_VERIFY;
+ w4.s.opcode_major = ROC_AE_MAJOR_OP_EC;
+ w4.s.opcode_minor = ROC_AE_MINOR_OP_EC_VERIFY;
w4.s.param1 = curveid | (message_len << 8);
w4.s.param2 = 0;
@@ -719,9 +719,9 @@ cnxk_ae_enqueue_ecdsa_op(struct rte_crypto_op *op,
static __rte_always_inline void
cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2,
- struct roc_ae_buf_ptr *meta_buf,
- uint64_t fpm_table_iova, struct roc_ae_ec_group *ec_grp,
- struct cnxk_ae_sess *sess, struct cpt_inst_s *inst)
+ struct roc_ae_buf_ptr *meta_buf,
+ uint64_t fpm_table_iova, struct roc_ae_ec_group *ec_grp,
+ struct cnxk_ae_sess *sess, struct cpt_inst_s *inst)
{
uint16_t message_len = sm2->message.length;
uint16_t pkey_len = sess->ec_ctx.pkey.length;
@@ -787,10 +787,12 @@ cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2,
dptr += p_align;
/* Setup opcodes */
- w4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;
- w4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_SIGN;
+ w4.s.opcode_major = ROC_AE_MAJOR_OP_EC;
+ w4.s.opcode_minor = ROC_AE_MINOR_OP_EC_SIGN;
- w4.s.param1 = 2 | 1 << 7 | 1 << 6 | (message_len << 8);
+ /* prime length of SM2 curve is same as that of P256. */
+ w4.s.param1 = ROC_AE_EC_ID_P256 |
+ ROC_AE_EC_PARAM1_SM2 | ROC_AE_EC_PARAM1_NONNIST | (message_len << 8);
w4.s.param2 = (p_align << 8) | k_len;
w4.s.dlen = dlen;
@@ -800,10 +802,10 @@ cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2,
static __rte_always_inline void
cnxk_ae_sm2_verify_prep(struct rte_crypto_sm2_op_param *sm2,
- struct roc_ae_buf_ptr *meta_buf,
- uint64_t fpm_table_iova,
- struct roc_ae_ec_group *ec_grp, struct cnxk_ae_sess *sess,
- struct cpt_inst_s *inst)
+ struct roc_ae_buf_ptr *meta_buf,
+ uint64_t fpm_table_iova,
+ struct roc_ae_ec_group *ec_grp, struct cnxk_ae_sess *sess,
+ struct cpt_inst_s *inst)
{
uint32_t message_len = sm2->message.length;
uint16_t o_offset, r_offset, s_offset;
@@ -881,10 +883,12 @@ cnxk_ae_sm2_verify_prep(struct rte_crypto_sm2_op_param *sm2,
dptr += p_align;
/* Setup opcodes */
- w4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;
- w4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_VERIFY;
+ w4.s.opcode_major = ROC_AE_MAJOR_OP_EC;
+ w4.s.opcode_minor = ROC_AE_MINOR_OP_EC_VERIFY;
- w4.s.param1 = 2 | 1 << 7 | 1 << 6 | (message_len << 8);
+ /* prime length of SM2 curve is same as that of P256. */
+ w4.s.param1 = ROC_AE_EC_ID_P256 |
+ ROC_AE_EC_PARAM1_SM2 | ROC_AE_EC_PARAM1_NONNIST | (message_len << 8);
w4.s.param2 = 0;
w4.s.dlen = dlen;
@@ -894,20 +898,20 @@ cnxk_ae_sm2_verify_prep(struct rte_crypto_sm2_op_param *sm2,
static __rte_always_inline int __rte_hot
cnxk_ae_enqueue_sm2_op(struct rte_crypto_op *op,
- struct roc_ae_buf_ptr *meta_buf,
- struct cnxk_ae_sess *sess, uint64_t *fpm_iova,
- struct roc_ae_ec_group **ec_grp,
- struct cpt_inst_s *inst)
+ struct roc_ae_buf_ptr *meta_buf,
+ struct cnxk_ae_sess *sess, uint64_t *fpm_iova,
+ struct roc_ae_ec_group **ec_grp,
+ struct cpt_inst_s *inst)
{
struct rte_crypto_sm2_op_param *sm2 = &op->asym->sm2;
uint8_t curveid = sess->ec_ctx.curveid;
if (sm2->op_type == RTE_CRYPTO_ASYM_OP_SIGN)
cnxk_ae_sm2_sign_prep(sm2, meta_buf, fpm_iova[curveid],
- ec_grp[curveid], sess, inst);
+ ec_grp[curveid], sess, inst);
else if (sm2->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
cnxk_ae_sm2_verify_prep(sm2, meta_buf, fpm_iova[curveid],
- ec_grp[curveid], sess, inst);
+ ec_grp[curveid], sess, inst);
else {
op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
return -EINVAL;
--
2.25.1
next prev parent reply other threads:[~2023-10-26 8:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-26 8:15 [PATCH v1 0/4] test/cryptodev: add ECDH tests Gowrishankar Muthukrishnan
2023-10-26 8:15 ` [PATCH v1 1/4] " Gowrishankar Muthukrishnan
2023-10-30 18:48 ` Akhil Goyal
2023-11-08 13:17 ` [PATCH v2] " Gowrishankar Muthukrishnan
2023-11-09 20:24 ` Akhil Goyal
2023-10-26 8:15 ` Gowrishankar Muthukrishnan [this message]
2023-10-26 8:15 ` [PATCH v1 3/4] crypto/cnxk: change order of ECFPM params Gowrishankar Muthukrishnan
2023-10-26 8:15 ` [PATCH v1 4/4] crypto/cnxk: add ECDH support Gowrishankar Muthukrishnan
2023-10-30 18:49 ` Akhil Goyal
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