From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BBBF0A04B6; Tue, 13 Oct 2020 10:57:22 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 70AAC1DAC7; Tue, 13 Oct 2020 10:57:21 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 219EA1DAB3 for ; Tue, 13 Oct 2020 10:57:18 +0200 (CEST) IronPort-SDR: ih1uJVaIQmS9bawgXp9PDRy7AymV+IvLeRlx3Cxd9V6o96sdA973FasKZQmKEb1naTzMx8Gvzu hmC41sJW9uUQ== X-IronPort-AV: E=McAfee;i="6000,8403,9772"; a="145193410" X-IronPort-AV: E=Sophos;i="5.77,369,1596524400"; d="scan'208";a="145193410" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 01:57:17 -0700 IronPort-SDR: hz9ROXz2vuN5bpu5n7Oldeh3R9LaxANQT/XPFiTBvuop3YMz5JjO+pnoNyuQZQldOS9PZQLTJB O9lF5wqxhR6w== X-IronPort-AV: E=Sophos;i="5.77,369,1596524400"; d="scan'208";a="530317724" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.214.64]) ([10.213.214.64]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 01:57:14 -0700 To: David Marchand , Radu Nicolau Cc: dev , Beilei Xing , Jeff Guo , Bruce Richardson , "Ananyev, Konstantin" , Jerin Jacob , "Trahe, Fiona" , Wei Zhao , "Ruifeng Wang (Arm Technology China)" , Qiming Yang , Qi Zhang , Akhil Goyal , David Christensen References: <1591870283-7776-1-git-send-email-radu.nicolau@intel.com> <20200923142253.18853-1-radu.nicolau@intel.com> From: Ferruh Yigit Message-ID: <2c1ecde4-0466-dff7-dc2a-187e13a5bcb0@intel.com> Date: Tue, 13 Oct 2020 09:57:11 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v12 0/5] eal: add WC store functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 10/8/2020 8:28 AM, David Marchand wrote: > On Wed, Sep 23, 2020 at 4:23 PM Radu Nicolau wrote: >> >> Implement 2 new functions that will enable write combining >> stores depending on architecture. The functions are provided >> as a generic stub and a x86 specific implementation. >> >> The reason to implement these functions is to improve performance >> by reducing the overhead associated with regular mmio writes when >> updating the hardware queue tails and doorbells. > > For the record, on which CPU/platform was this tested and how much of > an improvement did you get with this? > > I did not see review/ack tokens from other arch maintainers, but since > it has been on the ml for a while, I guess I can proceed as is. > > >> >> With this patch set the I40E, ICE, IXGBE and QAT PMDs are updated to >> use the write combining store functions with other PMDs to follow. > > This series will go through the main repo: copying Ferruh and Akhil for info. > Sounds good to me, +1 to not separate the driver implementation from actual change.