From: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
To: dev@dpdk.org
Cc: Chao Zhu <chaozhu@linux.vnet.ibm.com>,
Bruce Richardson <bruce.richardson@intel.com>,
Konstantin Ananyev <konstantin.ananyev@intel.com>,
Thomas Monjalon <thomas.monjalon@6wind.com>,
Cristian Dumitrescu <cristian.dumitrescu@intel.com>,
Pradeep <pradeep@us.ibm.com>,
Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Subject: [dpdk-dev] [PATCH v7 9/9] table: fix verification on hash bucket header alignment
Date: Thu, 8 Sep 2016 22:18:11 +0530 [thread overview]
Message-ID: <2c40193b09de3dff34b4c8aa4758d88fe69ddc10.1473349652.git.gowrishankar.m@linux.vnet.ibm.com> (raw)
In-Reply-To: <cover.1473349652.git.gowrishankar.m@linux.vnet.ibm.com>
In-Reply-To: <cover.1473349652.git.gowrishankar.m@linux.vnet.ibm.com>
From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
In powerpc systems, rte table hash structs rte_bucket_4_8, rte_bucket_4_16 and
rte_bucket_4_32 are not cache aligned and hence verification on same would fail.
Instead of checking alignment on cpu cacheline, it could equally be tested as
multiple of 64 bytes.
Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
---
lib/librte_table/rte_table_hash_key16.c | 4 ++--
lib/librte_table/rte_table_hash_key32.c | 4 ++--
lib/librte_table/rte_table_hash_key8.c | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/lib/librte_table/rte_table_hash_key16.c b/lib/librte_table/rte_table_hash_key16.c
index b7e000f..08d4d77 100644
--- a/lib/librte_table/rte_table_hash_key16.c
+++ b/lib/librte_table/rte_table_hash_key16.c
@@ -130,7 +130,7 @@ rte_table_hash_create_key16_lru(void *params,
/* Check input parameters */
if ((check_params_create_lru(p) != 0) ||
((sizeof(struct rte_table_hash) % RTE_CACHE_LINE_SIZE) != 0) ||
- ((sizeof(struct rte_bucket_4_16) % RTE_CACHE_LINE_SIZE) != 0))
+ ((sizeof(struct rte_bucket_4_16) % 64) != 0))
return NULL;
n_entries_per_bucket = 4;
key_size = 16;
@@ -344,7 +344,7 @@ rte_table_hash_create_key16_ext(void *params,
/* Check input parameters */
if ((check_params_create_ext(p) != 0) ||
((sizeof(struct rte_table_hash) % RTE_CACHE_LINE_SIZE) != 0) ||
- ((sizeof(struct rte_bucket_4_16) % RTE_CACHE_LINE_SIZE) != 0))
+ ((sizeof(struct rte_bucket_4_16) % 64) != 0))
return NULL;
n_entries_per_bucket = 4;
diff --git a/lib/librte_table/rte_table_hash_key32.c b/lib/librte_table/rte_table_hash_key32.c
index a7aba49..161f6b7 100644
--- a/lib/librte_table/rte_table_hash_key32.c
+++ b/lib/librte_table/rte_table_hash_key32.c
@@ -129,7 +129,7 @@ rte_table_hash_create_key32_lru(void *params,
/* Check input parameters */
if ((check_params_create_lru(p) != 0) ||
((sizeof(struct rte_table_hash) % RTE_CACHE_LINE_SIZE) != 0) ||
- ((sizeof(struct rte_bucket_4_32) % RTE_CACHE_LINE_SIZE) != 0)) {
+ ((sizeof(struct rte_bucket_4_32) % 64) != 0)) {
return NULL;
}
n_entries_per_bucket = 4;
@@ -337,7 +337,7 @@ rte_table_hash_create_key32_ext(void *params,
/* Check input parameters */
if ((check_params_create_ext(p) != 0) ||
((sizeof(struct rte_table_hash) % RTE_CACHE_LINE_SIZE) != 0) ||
- ((sizeof(struct rte_bucket_4_32) % RTE_CACHE_LINE_SIZE) != 0))
+ ((sizeof(struct rte_bucket_4_32) % 64) != 0))
return NULL;
n_entries_per_bucket = 4;
diff --git a/lib/librte_table/rte_table_hash_key8.c b/lib/librte_table/rte_table_hash_key8.c
index e2e2bdc..b04f60d 100644
--- a/lib/librte_table/rte_table_hash_key8.c
+++ b/lib/librte_table/rte_table_hash_key8.c
@@ -125,7 +125,7 @@ rte_table_hash_create_key8_lru(void *params, int socket_id, uint32_t entry_size)
/* Check input parameters */
if ((check_params_create_lru(p) != 0) ||
((sizeof(struct rte_table_hash) % RTE_CACHE_LINE_SIZE) != 0) ||
- ((sizeof(struct rte_bucket_4_8) % RTE_CACHE_LINE_SIZE) != 0)) {
+ ((sizeof(struct rte_bucket_4_8) % 64) != 0)) {
return NULL;
}
n_entries_per_bucket = 4;
@@ -332,7 +332,7 @@ rte_table_hash_create_key8_ext(void *params, int socket_id, uint32_t entry_size)
/* Check input parameters */
if ((check_params_create_ext(p) != 0) ||
((sizeof(struct rte_table_hash) % RTE_CACHE_LINE_SIZE) != 0) ||
- ((sizeof(struct rte_bucket_4_8) % RTE_CACHE_LINE_SIZE) != 0))
+ ((sizeof(struct rte_bucket_4_8) % 64) != 0))
return NULL;
n_entries_per_bucket = 4;
--
1.9.1
next prev parent reply other threads:[~2016-09-08 16:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-08 16:48 [dpdk-dev] [PATCH v7 0/9] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 1/9] lpm: add altivec intrinsics for dpdk lpm on ppc_64 Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 2/9] acl: add altivec intrinsics for dpdk acl " Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 3/9] l3fwd: add altivec support for em_hash_key Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 4/9] table: enable table library for ppc64le Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 5/9] sched: enable sched " Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 6/9] port: enable port " Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 7/9] pipeline: enable pipeline " Gowrishankar
2016-09-08 16:48 ` [dpdk-dev] [PATCH v7 8/9] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64 Gowrishankar
2016-09-08 16:48 ` Gowrishankar [this message]
2016-09-08 16:54 ` [dpdk-dev] [PATCH v7 0/9] enable lpm, acl and other missing libraries in ppc64le Dumitrescu, Cristian
2016-09-09 15:59 ` Thomas Monjalon
2016-09-27 6:46 ` gowrishankar muthukrishnan
2016-09-27 7:01 ` [dpdk-dev] [dpdk-stable] " Yuanhan Liu
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