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From: "Kulasek, TomaszX" <tomaszx.kulasek@intel.com>
To: "Wu, Jingjing" <jingjing.wu@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
CC: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
Thread-Topic: [dpdk-dev] [PATCH v4 4/6] i40e: add Tx preparation
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Date: Mon, 10 Oct 2016 17:20:37 +0000
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Subject: Re: [dpdk-dev] [PATCH v4 4/6] i40e: add Tx preparation
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Hi Jingjing,

> -----Original Message-----
> From: Wu, Jingjing
> Sent: Monday, October 10, 2016 16:03
> To: Kulasek, TomaszX <tomaszx.kulasek@intel.com>; dev@dpdk.org
> Cc: Ananyev, Konstantin <konstantin.ananyev@intel.com>; Kulasek, TomaszX
> <tomaszx.kulasek@intel.com>
> Subject: RE: [dpdk-dev] [PATCH v4 4/6] i40e: add Tx preparation
>=20
> >  #include "i40e_logs.h"
> >  #include "base/i40e_prototype.h"
> > @@ -79,6 +81,17 @@
> >  		PKT_TX_TCP_SEG |		 \
> >  		PKT_TX_OUTER_IP_CKSUM)
> >
> > +#define I40E_TX_OFFLOAD_MASK (  \
> > +		PKT_TX_IP_CKSUM |       \
> > +		PKT_TX_L4_MASK |        \
> > +		PKT_TX_OUTER_IP_CKSUM | \
> > +		PKT_TX_TCP_SEG |        \
> > +		PKT_TX_QINQ_PKT |       \
> > +		PKT_TX_VLAN_PKT)
> > +
> More TX flags are added for tunneling as below.
> /**
>  * Bits 45:48 used for the tunnel type.
>  * When doing Tx offload like TSO or checksum, the HW needs to configure
> the
>  * tunnel type into the HW descriptors.
>  */
> #define PKT_TX_TUNNEL_VXLAN   (0x1ULL << 45)
> #define PKT_TX_TUNNEL_GRE     (0x2ULL << 45)
> #define PKT_TX_TUNNEL_IPIP    (0x3ULL << 45)
> #define PKT_TX_TUNNEL_GENEVE  (0x4ULL << 45)
> /* add new TX TUNNEL type here */
> #define PKT_TX_TUNNEL_MASK    (0xFULL << 45)
>=20
> Please check:
> commit 63c0d74daaa9a807fbca8a3e363bbe41d6fb715f
> Author: Jianfeng Tan <jianfeng.tan@intel.com>
> Date:   Mon Aug 1 03:56:53 2016 +0000
>=20
>     mbuf: add Tx side tunneling type
>=20
>=20
> Thanks
> Jingjing

Thanks for spotting this, I will send updated v5.

Tomasz