From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AF0DC43CFF; Wed, 20 Mar 2024 12:37:22 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C468D41101; Wed, 20 Mar 2024 12:37:21 +0100 (CET) Received: from fhigh4-smtp.messagingengine.com (fhigh4-smtp.messagingengine.com [103.168.172.155]) by mails.dpdk.org (Postfix) with ESMTP id 2E3D5402A2; Wed, 20 Mar 2024 12:37:20 +0100 (CET) Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 8409C11400C2; Wed, 20 Mar 2024 07:37:19 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Wed, 20 Mar 2024 07:37:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to; s=fm2; t=1710934639; x=1711021039; bh=jUi0OFC+iNfLm0NlW5hleJAGVdu7+Lq3/8VeP4UOomM=; b= MG7VE5R5c+LLFXiaYuMLt3UqcgNEk0/xJI94JYDn8vCpQbEZDHAVVb6WRiMtq6hl iJgXpcxcFrCPq+wH+J3GefGbQUWHv/LAdo0NU1QjmWA0sl+unrJEIfnsmZMLqkrY IWKIOEVU2Ypy+4QvyFepakWfxNRr2UURQWtZktXcqMTUUhqF9HkQPAKZIfgpm8gV H79ItsPlLB9Y60wX0nlnNKXP4AhsxDCXX8dF2w4AfwCPJZglL/dEmT0LQbUDr74R qUShx+8VZfUwEoILUczbPU0k2nHblDtRzd7nogbwBLbjBHoAdInanGLnowIlPsSK MmDXUS9/nHD9k8ZXvmsaHw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1710934639; x= 1711021039; bh=jUi0OFC+iNfLm0NlW5hleJAGVdu7+Lq3/8VeP4UOomM=; b=r Zg+JIH1HiaJnS+hE4gc8Bd983XTE/wQAWDOvOldmLks+0BvHyl9pow2SWYmSvrXv foB7CaVcNd/nr3A1rUPJ3dqycKKRDquugXRIF9HxaiPktpqk/WH5weVehUJxvjr1 mvx1/p3reJEWV4bHL1KYjf1pgBjOkkXVA1vLbxwXn5GSHvR9jRFcXbLe9ebounvo 6z5fneXsyNalzY9y7uFVaCJ1RO+B6aAnFMFWVMI+Mjzm9qPMg1bsQiRZMN450mh1 ZsLFVSNgTRnZrA6Fh0Rd96uXMAAcOJ8R/taKN+wZSBOIXvYGLhX+slPcZoqzU3QI ieU8EcJJyRwLtaMX8MOoA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrleeggdeftdcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecunecujfgurhephffvvefufffkjghfggfgtgesthfure dttddtjeenucfhrhhomhepvfhhohhmrghsucfoohhnjhgrlhhonhcuoehthhhomhgrshes mhhonhhjrghlohhnrdhnvghtqeenucggtffrrghtthgvrhhnpeeljeeitdefheetvddvvd etjedvleeuffdtheeludejfeekieehjeeuhfehfeetleenucffohhmrghinheptghpphhr vghfvghrvghntggvrdgtohhmnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpe hmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgrlhhonhdrnhgvth X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 20 Mar 2024 07:37:18 -0400 (EDT) From: Thomas Monjalon To: fengchengwen@huawei.com, Wenwu Ma Cc: dev@dpdk.org, songx.jiale@intel.com, stable@dpdk.org Subject: Re: [PATCH v3] dmadev: fix structure alignment Date: Wed, 20 Mar 2024 12:37:16 +0100 Message-ID: <3047329.687JKscXgg@thomas> In-Reply-To: <20240320072332.1433526-1-wenwux.ma@intel.com> References: <20240308053711.1260154-1-wenwux.ma@intel.com> <20240320072332.1433526-1-wenwux.ma@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="utf-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 20/03/2024 08:23, Wenwu Ma: > The structure rte_dma_dev needs to be aligned to the cache line, but > the return value of malloc may not be aligned to the cache line. When > we use memset to clear the rte_dma_dev object, it may cause a segmentation > fault in clang-x86-platform. > > This is because clang uses the "vmovaps" assembly instruction for > memset, which requires that the operands (rte_dma_dev objects) must > aligned on a 16-byte boundary or a general-protection exception (#GP) > is generated. > > Therefore, either additional memory is applied for re-alignment, or the > rte_dma_dev object does not require cache line alignment. The patch > chooses the former option to fix the issue. > > Fixes: b36970f2e13e ("dmadev: introduce DMA device library") > Cc: stable@dpdk.org > > Signed-off-by: Wenwu Ma [..] > - size = dma_devices_max * sizeof(struct rte_dma_dev); > - rte_dma_devices = malloc(size); > - if (rte_dma_devices == NULL) > + /* The dma device object is expected to align cacheline, but > + * the return value of malloc may not be aligned to the cache line. > + * Therefore, extra memory is applied for realignment. > + * note: We do not call posix_memalign/aligned_alloc because it is > + * version dependent on libc. > + */ > + size = dma_devices_max * sizeof(struct rte_dma_dev) + > + RTE_CACHE_LINE_SIZE; > + ptr = malloc(size); > + if (ptr == NULL) > return -ENOMEM; > - memset(rte_dma_devices, 0, size); > + memset(ptr, 0, size); > + > + rte_dma_devices = RTE_PTR_ALIGN(ptr, RTE_CACHE_LINE_SIZE); Why not using aligned_alloc()? https://en.cppreference.com/w/c/memory/aligned_alloc