From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4F167A0550; Wed, 25 May 2022 13:58:36 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E90DA40146; Wed, 25 May 2022 13:58:35 +0200 (CEST) Received: from shelob.oktetlabs.ru (shelob.oktetlabs.ru [91.220.146.113]) by mails.dpdk.org (Postfix) with ESMTP id 3033B400EF for ; Wed, 25 May 2022 13:58:34 +0200 (CEST) Received: from [192.168.38.17] (aros.oktetlabs.ru [192.168.38.17]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by shelob.oktetlabs.ru (Postfix) with ESMTPSA id AFE538A; Wed, 25 May 2022 14:58:33 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 shelob.oktetlabs.ru AFE538A DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=oktetlabs.ru; s=default; t=1653479913; bh=FayQCXYirLFmzNRbvX71dkaBiqHx34CoTJ4bpfy45I0=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=qIs1GXIabcCvcf8SPqnGjgKEFORq0rBzgi6AZIiBzmRpV0+3g4ot3TQBtUWIsLYdS 3+QHp8unqXVf0NvoBqPmXstifcQAcZRNZiZkkvFdGMVN72Gttxz9eexe1Xju66RwGA HdUQTo9if59WmOTvKIKEfU20DMsNOlf0GjdrEcxs= Message-ID: <335badf5-1436-75ec-7495-2fde1a75d8c5@oktetlabs.ru> Date: Wed, 25 May 2022 14:58:33 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v8 4/5] ethdev: format module EEPROM for SFF-8472 Content-Language: en-US To: Robin Zhang , dev@dpdk.org Cc: thomas@monjalon.net, kevinx.liu@intel.com References: <20220524062442.194809-1-robinx.zhang@intel.com> <20220525031446.72578-1-robinx.zhang@intel.com> <20220525031446.72578-5-robinx.zhang@intel.com> From: Andrew Rybchenko Organization: OKTET Labs In-Reply-To: <20220525031446.72578-5-robinx.zhang@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On 5/25/22 06:14, Robin Zhang wrote: > This patch implements format module EEPROM information for > SFF-8472 Rev 12.0 > > Signed-off-by: Robin Zhang [snip] > diff --git a/lib/ethdev/sff_8472.c b/lib/ethdev/sff_8472.c > new file mode 100644 > index 0000000000..98e31e9262 > --- /dev/null > +++ b/lib/ethdev/sff_8472.c > @@ -0,0 +1,286 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2022 Intel Corporation > + * > + * Implements SFF-8472 optics diagnostics. > + * > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include "sff_common.h" > +#include "ethdev_sff_telemetry.h" Please, fix includes in accordance with previous patches review notes. > + > +/* Offsets in decimal, for direct comparison with the SFF specs */ > + > +/* A0-based EEPROM offsets for DOM support checks */ > +#define SFF_A0_DOM 92 > +#define SFF_A0_OPTIONS 93 > +#define SFF_A0_COMP 94 > + > +/* EEPROM bit values for various registers */ > +#define SFF_A0_DOM_EXTCAL (1 << 4) > +#define SFF_A0_DOM_INTCAL (1 << 5) > +#define SFF_A0_DOM_IMPL (1 << 6) > +#define SFF_A0_DOM_PWRT (1 << 3) > + > +#define SFF_A0_OPTIONS_AW (1 << 7) RTE_BIT32 ? > + > +/* > + * This is the offset at which the A2 page is in the EEPROM > + * blob returned by the kernel. > + */ > +#define SFF_A2_BASE 0x100 > + > +/* A2-based offsets for DOM */ > +#define SFF_A2_TEMP 96 > +#define SFF_A2_TEMP_HALRM 0 > +#define SFF_A2_TEMP_LALRM 2 > +#define SFF_A2_TEMP_HWARN 4 > +#define SFF_A2_TEMP_LWARN 6 > + > +#define SFF_A2_VCC 98 > +#define SFF_A2_VCC_HALRM 8 > +#define SFF_A2_VCC_LALRM 10 > +#define SFF_A2_VCC_HWARN 12 > +#define SFF_A2_VCC_LWARN 14 > + > +#define SFF_A2_BIAS 100 > +#define SFF_A2_BIAS_HALRM 16 > +#define SFF_A2_BIAS_LALRM 18 > +#define SFF_A2_BIAS_HWARN 20 > +#define SFF_A2_BIAS_LWARN 22 > + > +#define SFF_A2_TX_PWR 102 > +#define SFF_A2_TX_PWR_HALRM 24 > +#define SFF_A2_TX_PWR_LALRM 26 > +#define SFF_A2_TX_PWR_HWARN 28 > +#define SFF_A2_TX_PWR_LWARN 30 > + > +#define SFF_A2_RX_PWR 104 > +#define SFF_A2_RX_PWR_HALRM 32 > +#define SFF_A2_RX_PWR_LALRM 34 > +#define SFF_A2_RX_PWR_HWARN 36 > +#define SFF_A2_RX_PWR_LWARN 38 > + > +#define SFF_A2_ALRM_FLG 112 > +#define SFF_A2_WARN_FLG 116 > + > +/* 32-bit little-endian calibration constants */ > +#define SFF_A2_CAL_RXPWR4 56 > +#define SFF_A2_CAL_RXPWR3 60 > +#define SFF_A2_CAL_RXPWR2 64 > +#define SFF_A2_CAL_RXPWR1 68 > +#define SFF_A2_CAL_RXPWR0 72 > + > +/* 16-bit little endian calibration constants */ > +#define SFF_A2_CAL_TXI_SLP 76 > +#define SFF_A2_CAL_TXI_OFF 78 > +#define SFF_A2_CAL_TXPWR_SLP 80 > +#define SFF_A2_CAL_TXPWR_OFF 82 > +#define SFF_A2_CAL_T_SLP 84 > +#define SFF_A2_CAL_T_OFF 86 > +#define SFF_A2_CAL_V_SLP 88 > +#define SFF_A2_CAL_V_OFF 90 > + > +static struct sff_8472_aw_flags { > + const char *str; /* Human-readable string, null at the end */ > + int offset; /* A2-relative address offset */ > + uint8_t value; /* Alarm is on if (offset & value) != 0. */ > +} sff_8472_aw_flags[] = { > + { "Laser bias current high alarm", SFF_A2_ALRM_FLG, (1 << 3) }, RTE_BIT32 here and below? > + { "Laser bias current low alarm", SFF_A2_ALRM_FLG, (1 << 2) }, > + { "Laser bias current high warning", SFF_A2_WARN_FLG, (1 << 3) }, > + { "Laser bias current low warning", SFF_A2_WARN_FLG, (1 << 2) }, > + > + { "Laser output power high alarm", SFF_A2_ALRM_FLG, (1 << 1) }, > + { "Laser output power low alarm", SFF_A2_ALRM_FLG, (1 << 0) }, > + { "Laser output power high warning", SFF_A2_WARN_FLG, (1 << 1) }, > + { "Laser output power low warning", SFF_A2_WARN_FLG, (1 << 0) }, > + > + { "Module temperature high alarm", SFF_A2_ALRM_FLG, (1 << 7) }, > + { "Module temperature low alarm", SFF_A2_ALRM_FLG, (1 << 6) }, > + { "Module temperature high warning", SFF_A2_WARN_FLG, (1 << 7) }, > + { "Module temperature low warning", SFF_A2_WARN_FLG, (1 << 6) }, > + > + { "Module voltage high alarm", SFF_A2_ALRM_FLG, (1 << 5) }, > + { "Module voltage low alarm", SFF_A2_ALRM_FLG, (1 << 4) }, > + { "Module voltage high warning", SFF_A2_WARN_FLG, (1 << 5) }, > + { "Module voltage low warning", SFF_A2_WARN_FLG, (1 << 4) }, > + > + { "Laser rx power high alarm", SFF_A2_ALRM_FLG + 1, (1 << 7) }, > + { "Laser rx power low alarm", SFF_A2_ALRM_FLG + 1, (1 << 6) }, > + { "Laser rx power high warning", SFF_A2_WARN_FLG + 1, (1 << 7) }, > + { "Laser rx power low warning", SFF_A2_WARN_FLG + 1, (1 << 6) }, > + > + { NULL, 0, 0 }, > +};