From: Anatoly Burakov <anatoly.burakov@intel.com>
To: dev@dpdk.org
Cc: vladimir.medvedkin@intel.com, bruce.richardson@intel.com
Subject: [PATCH v3 27/30] net/ixgbe/base: add NVM init and populate
Date: Thu, 30 May 2024 12:14:00 +0100 [thread overview]
Message-ID: <336ada0f0d6c70e7f362594aa723ce2706a4e236.1717067519.git.anatoly.burakov@intel.com> (raw)
In-Reply-To: <cover.1717067518.git.anatoly.burakov@intel.com>
The driver can store NVM settings in its internal structures. Add
functions to initialize and populate these structures through the
Admin Command Interface.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
drivers/net/ixgbe/base/ixgbe_e610.c | 245 ++++++++++++++++++++++++++++
drivers/net/ixgbe/base/ixgbe_e610.h | 2 +
2 files changed, 247 insertions(+)
diff --git a/drivers/net/ixgbe/base/ixgbe_e610.c b/drivers/net/ixgbe/base/ixgbe_e610.c
index 0b3947501b..f3c80fa150 100644
--- a/drivers/net/ixgbe/base/ixgbe_e610.c
+++ b/drivers/net/ixgbe/base/ixgbe_e610.c
@@ -2528,6 +2528,251 @@ s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm)
return ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, nvm);
}
+/**
+ * ixgbe_read_sr_pointer - Read the value of a Shadow RAM pointer word
+ * @hw: pointer to the HW structure
+ * @offset: the word offset of the Shadow RAM word to read
+ * @pointer: pointer value read from Shadow RAM
+ *
+ * Read the given Shadow RAM word, and convert it to a pointer value specified
+ * in bytes. This function assumes the specified offset is a valid pointer
+ * word.
+ *
+ * Each pointer word specifies whether it is stored in word size or 4KB
+ * sector size by using the highest bit. The reported pointer value will be in
+ * bytes, intended for flat NVM reads.
+ *
+ * Return: the exit code of the operation.
+ */
+static s32 ixgbe_read_sr_pointer(struct ixgbe_hw *hw, u16 offset, u32 *pointer)
+{
+ s32 status;
+ u16 value;
+
+ status = ixgbe_read_ee_aci_E610(hw, offset, &value);
+ if (status)
+ return status;
+
+ /* Determine if the pointer is in 4KB or word units */
+ if (value & IXGBE_SR_NVM_PTR_4KB_UNITS)
+ *pointer = (value & ~IXGBE_SR_NVM_PTR_4KB_UNITS) * 4 * 1024;
+ else
+ *pointer = value * 2;
+
+ return IXGBE_SUCCESS;
+}
+
+/**
+ * ixgbe_read_sr_area_size - Read an area size from a Shadow RAM word
+ * @hw: pointer to the HW structure
+ * @offset: the word offset of the Shadow RAM to read
+ * @size: size value read from the Shadow RAM
+ *
+ * Read the given Shadow RAM word, and convert it to an area size value
+ * specified in bytes. This function assumes the specified offset is a valid
+ * area size word.
+ *
+ * Each area size word is specified in 4KB sector units. This function reports
+ * the size in bytes, intended for flat NVM reads.
+ *
+ * Return: the exit code of the operation.
+ */
+static s32 ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size)
+{
+ s32 status;
+ u16 value;
+
+ status = ixgbe_read_ee_aci_E610(hw, offset, &value);
+ if (status)
+ return status;
+
+ /* Area sizes are always specified in 4KB units */
+ *size = value * 4 * 1024;
+
+ return IXGBE_SUCCESS;
+}
+
+/**
+ * ixgbe_discover_flash_size - Discover the available flash size.
+ * @hw: pointer to the HW struct
+ *
+ * The device flash could be up to 16MB in size. However, it is possible that
+ * the actual size is smaller. Use bisection to determine the accessible size
+ * of flash memory.
+ *
+ * Return: the exit code of the operation.
+ */
+static s32 ixgbe_discover_flash_size(struct ixgbe_hw *hw)
+{
+ u32 min_size = 0, max_size = IXGBE_ACI_NVM_MAX_OFFSET + 1;
+ s32 status;
+
+ status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);
+ if (status)
+ return status;
+
+ while ((max_size - min_size) > 1) {
+ u32 offset = (max_size + min_size) / 2;
+ u32 len = 1;
+ u8 data;
+
+ status = ixgbe_read_flat_nvm(hw, offset, &len, &data, false);
+ if (status == IXGBE_ERR_ACI_ERROR &&
+ hw->aci.last_status == IXGBE_ACI_RC_EINVAL) {
+ status = IXGBE_SUCCESS;
+ max_size = offset;
+ } else if (!status) {
+ min_size = offset;
+ } else {
+ /* an unexpected error occurred */
+ goto err_read_flat_nvm;
+ }
+ }
+
+ hw->flash.flash_size = max_size;
+
+err_read_flat_nvm:
+ ixgbe_release_nvm(hw);
+
+ return status;
+}
+
+/**
+ * ixgbe_determine_active_flash_banks - Discover active bank for each module
+ * @hw: pointer to the HW struct
+ *
+ * Read the Shadow RAM control word and determine which banks are active for
+ * the NVM, OROM, and Netlist modules. Also read and calculate the associated
+ * pointer and size. These values are then cached into the ixgbe_flash_info
+ * structure for later use in order to calculate the correct offset to read
+ * from the active module.
+ *
+ * Return: the exit code of the operation.
+ */
+static s32 ixgbe_determine_active_flash_banks(struct ixgbe_hw *hw)
+{
+ struct ixgbe_bank_info *banks = &hw->flash.banks;
+ u16 ctrl_word;
+ s32 status;
+
+ status = ixgbe_read_ee_aci_E610(hw, E610_SR_NVM_CTRL_WORD, &ctrl_word);
+ if (status) {
+ return status;
+ }
+
+ /* Check that the control word indicates validity */
+ if ((ctrl_word & IXGBE_SR_CTRL_WORD_1_M) >> IXGBE_SR_CTRL_WORD_1_S !=
+ IXGBE_SR_CTRL_WORD_VALID) {
+ return IXGBE_ERR_CONFIG;
+ }
+
+ if (!(ctrl_word & IXGBE_SR_CTRL_WORD_NVM_BANK))
+ banks->nvm_bank = IXGBE_1ST_FLASH_BANK;
+ else
+ banks->nvm_bank = IXGBE_2ND_FLASH_BANK;
+
+ if (!(ctrl_word & IXGBE_SR_CTRL_WORD_OROM_BANK))
+ banks->orom_bank = IXGBE_1ST_FLASH_BANK;
+ else
+ banks->orom_bank = IXGBE_2ND_FLASH_BANK;
+
+ if (!(ctrl_word & IXGBE_SR_CTRL_WORD_NETLIST_BANK))
+ banks->netlist_bank = IXGBE_1ST_FLASH_BANK;
+ else
+ banks->netlist_bank = IXGBE_2ND_FLASH_BANK;
+
+ status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_NVM_BANK_PTR,
+ &banks->nvm_ptr);
+ if (status) {
+ return status;
+ }
+
+ status = ixgbe_read_sr_area_size(hw, E610_SR_NVM_BANK_SIZE,
+ &banks->nvm_size);
+ if (status) {
+ return status;
+ }
+
+ status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_OROM_BANK_PTR,
+ &banks->orom_ptr);
+ if (status) {
+ return status;
+ }
+
+ status = ixgbe_read_sr_area_size(hw, E610_SR_OROM_BANK_SIZE,
+ &banks->orom_size);
+ if (status) {
+ return status;
+ }
+
+ status = ixgbe_read_sr_pointer(hw, E610_SR_NETLIST_BANK_PTR,
+ &banks->netlist_ptr);
+ if (status) {
+ return status;
+ }
+
+ status = ixgbe_read_sr_area_size(hw, E610_SR_NETLIST_BANK_SIZE,
+ &banks->netlist_size);
+ if (status) {
+ return status;
+ }
+
+ return IXGBE_SUCCESS;
+}
+
+/**
+ * ixgbe_init_nvm - initializes NVM setting
+ * @hw: pointer to the HW struct
+ *
+ * Read and populate NVM settings such as Shadow RAM size,
+ * max_timeout, and blank_nvm_mode
+ *
+ * Return: the exit code of the operation.
+ */
+s32 ixgbe_init_nvm(struct ixgbe_hw *hw)
+{
+ struct ixgbe_flash_info *flash = &hw->flash;
+ u32 fla, gens_stat, status;
+ u8 sr_size;
+
+ /* The SR size is stored regardless of the NVM programming mode
+ * as the blank mode may be used in the factory line.
+ */
+ gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS);
+ sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S;
+
+ /* Switching to words (sr_size contains power of 2) */
+ flash->sr_words = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB;
+
+ /* Check if we are in the normal or blank NVM programming mode */
+ fla = IXGBE_READ_REG(hw, GLNVM_FLA);
+ if (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */
+ flash->blank_nvm_mode = false;
+ } else {
+ /* Blank programming mode */
+ flash->blank_nvm_mode = true;
+ return IXGBE_ERR_NVM_BLANK_MODE;
+ }
+
+ status = ixgbe_discover_flash_size(hw);
+ if (status) {
+ return status;
+ }
+
+ status = ixgbe_determine_active_flash_banks(hw);
+ if (status) {
+ return status;
+ }
+
+ status = ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK,
+ &flash->nvm);
+ if (status) {
+ return status;
+ }
+
+ return IXGBE_SUCCESS;
+}
+
/**
* ixgbe_read_sr_word_aci - Reads Shadow RAM via ACI
* @hw: pointer to the HW structure
diff --git a/drivers/net/ixgbe/base/ixgbe_e610.h b/drivers/net/ixgbe/base/ixgbe_e610.h
index b9abe3a6ee..d45ea73030 100644
--- a/drivers/net/ixgbe/base/ixgbe_e610.h
+++ b/drivers/net/ixgbe/base/ixgbe_e610.h
@@ -81,6 +81,8 @@ s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw);
s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);
s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);
+s32 ixgbe_init_nvm(struct ixgbe_hw *hw);
+
s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data);
s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, u16 *data);
s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,
--
2.43.0
next prev parent reply other threads:[~2024-05-30 11:18 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 13:21 [PATCH v1 00/22] Update IXGBE base driver Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 01/22] net/ixgbe/base: revert remove default advertising for x550 2.5G/5G Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 02/22] net/ixgbe/base: fix wrong 5G link speed reported on VF Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 03/22] net/ixgbe/base: fix PHY ID for X550 Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 04/22] net/ixgbe/base: rename message type macros Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 05/22] net/ixgbe/base: correct registers names to match datasheet Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 06/22] net/ixgbe/base: introduce new mailbox API Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 07/22] net/ixgbe/base: increase DCB BW calculation for MTU from 4088 to 9128 Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 08/22] net/ixgbe/base: fix crash while loading driver Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 09/22] net/ixgbe/base: improve function comments Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 10/22] net/ixgbe/base: add fw_rst_cnt field to ixgbe_hw struct Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 11/22] net/ixgbe/base: replace HIC with direct register access Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 12/22] net/ixgbe/base: added link state handling Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 13/22] net/ixgbe/base: handle -Wimplicit-fallthrough Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 14/22] net/ixgbe/base: remove non-inclusive language Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 15/22] net/ixgbe/base: filter out spurious link up indication Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 16/22] net/ixgbe/base: remove circular header dependency Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 17/22] net/ixgbe/base: add missing QV defines Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 18/22] net/ixgbe/base: improve SWFW semaphore acquisition Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 19/22] net/ixgbe/base: prevent untrusted loop bound Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 20/22] net/ixgbe/base: add IXGBE_ADVTXD_MACLEN_MASK macro Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 21/22] net/ixgbe/base: remove prototypes of unimplemented functions Anatoly Burakov
2024-04-24 13:21 ` [PATCH v1 22/22] net/ixgbe/base: add support for E610 device Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 00/27] Update IXGBE base driver Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 01/27] net/ixgbe/base: revert remove default advertising for x550 2.5G/5G Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 02/27] net/ixgbe/base: fix wrong 5G link speed reported on VF Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 03/27] net/ixgbe/base: fix PHY ID for X550 Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 04/27] net/ixgbe/base: rename message type macros Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 05/27] net/ixgbe/base: correct registers names to match datasheet Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 06/27] net/ixgbe/base: introduce new mailbox API Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 07/27] net/ixgbe/base: increase DCB BW calculation for MTU from 4088 to 9128 Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 08/27] net/ixgbe/base: fix crash while loading driver Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 09/27] net/ixgbe/base: improve function comments Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 10/27] net/ixgbe/base: add fw_rst_cnt field to ixgbe_hw struct Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 11/27] net/ixgbe/base: replace HIC with direct register access Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 12/27] net/ixgbe/base: added link state handling Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 13/27] net/ixgbe/base: handle -Wimplicit-fallthrough Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 14/27] net/ixgbe/base: remove non-inclusive language Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 15/27] net/ixgbe/base: filter out spurious link up indication Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 16/27] net/ixgbe/base: remove circular header dependency Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 17/27] net/ixgbe/base: add missing QV defines Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 18/27] net/ixgbe/base: improve SWFW semaphore acquisition Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 19/27] net/ixgbe/base: prevent untrusted loop bound Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 20/27] net/ixgbe/base: add IXGBE_ADVTXD_MACLEN_MASK macro Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 21/27] net/ixgbe/base: remove prototypes of unimplemented functions Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 22/27] net/ixgbe/base: add support for E610 Admin Command Interface Anatoly Burakov
2024-05-24 9:49 ` Bruce Richardson
2024-05-03 13:57 ` [PATCH v2 23/27] net/ixgbe/base: add support for E610 device capabilities detection Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 24/27] net/ixgbe/base: add link management support for E610 device Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 25/27] net/ixgbe/base: add support for NVM handling in " Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 26/27] net/ixgbe/base: enable E610 device support Anatoly Burakov
2024-05-03 13:57 ` [PATCH v2 27/27] net/ixgbe/base: add various miscellaneous features Anatoly Burakov
2024-05-24 9:58 ` Bruce Richardson
2024-05-30 11:13 ` [PATCH v3 00/30] Update IXGBE base driver Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 01/30] net/ixgbe/base: revert remove default advertising for x550 2.5G/5G Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 02/30] net/ixgbe/base: fix wrong 5G link speed reported on VF Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 03/30] net/ixgbe/base: fix PHY ID for X550 Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 04/30] net/ixgbe/base: rename message type macros Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 05/30] net/ixgbe/base: correct registers names to match datasheet Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 06/30] net/ixgbe/base: introduce new mailbox API Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 07/30] net/ixgbe/base: increase DCB BW calculation for MTU from 4088 to 9128 Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 08/30] net/ixgbe/base: improve function comments Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 09/30] net/ixgbe/base: add fw_rst_cnt field to ixgbe_hw struct Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 10/30] net/ixgbe/base: replace HIC with direct register access Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 11/30] net/ixgbe/base: added link state handling Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 12/30] net/ixgbe/base: handle -Wimplicit-fallthrough Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 13/30] net/ixgbe/base: remove non-inclusive language Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 14/30] net/ixgbe/base: filter out spurious link up indication Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 15/30] net/ixgbe/base: remove circular header dependency Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 16/30] net/ixgbe/base: add missing QV defines Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 17/30] net/ixgbe/base: improve SWFW semaphore acquisition Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 18/30] net/ixgbe/base: prevent untrusted loop bound Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 19/30] net/ixgbe/base: remove prototypes of unimplemented functions Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 20/30] net/ixgbe/base: add definitions for E610 Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 21/30] net/ixgbe/base: add support for E610 Admin Command Interface Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 22/30] net/ixgbe/base: add support for E610 device capabilities detection Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 23/30] net/ixgbe/base: add link management support for E610 device Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 24/30] net/ixgbe/base: add support for NVM handling in " Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 25/30] net/ixgbe/base: enable E610 device support Anatoly Burakov
2024-05-30 11:13 ` [PATCH v3 26/30] net/ixgbe/base: add i2c and GPIO read/write API Anatoly Burakov
2024-05-30 11:14 ` Anatoly Burakov [this message]
2024-05-30 11:14 ` [PATCH v3 28/30] net/ixgbe/base: alternate structure operations support Anatoly Burakov
2024-05-30 11:14 ` [PATCH v3 29/30] net/ixgbe/base: support more NVM-related operations Anatoly Burakov
2024-05-30 11:14 ` [PATCH v3 30/30] net/ixgbe/base: add various miscellaneous features Anatoly Burakov
2024-05-30 15:01 ` [PATCH v3 00/30] Update IXGBE base driver Bruce Richardson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=336ada0f0d6c70e7f362594aa723ce2706a4e236.1717067519.git.anatoly.burakov@intel.com \
--to=anatoly.burakov@intel.com \
--cc=bruce.richardson@intel.com \
--cc=dev@dpdk.org \
--cc=vladimir.medvedkin@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).