From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C229E43CFF; Wed, 20 Mar 2024 12:41:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 58AA1410FB; Wed, 20 Mar 2024 12:41:20 +0100 (CET) Received: from fhigh4-smtp.messagingengine.com (fhigh4-smtp.messagingengine.com [103.168.172.155]) by mails.dpdk.org (Postfix) with ESMTP id B3CE5402B9 for ; Wed, 20 Mar 2024 12:41:18 +0100 (CET) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfhigh.nyi.internal (Postfix) with ESMTP id E771E11400D3; Wed, 20 Mar 2024 07:41:17 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Wed, 20 Mar 2024 07:41:17 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to; s=fm2; t=1710934877; x=1711021277; bh=oQ7lrlPCMV4WZiz/Sou0AV8Vl9QDhV7S1tjB5+7c420=; b= M/rIEw95A3LXaInOHqBYxw8dkkI+rdinEcayPPRDGLPhrj0VFAFtO9Mw8vn9Mtmn JZmlTmtoNUMVGSb0oZKDfMLkavexcdthBO5Z2au5YyF9F0o8Zwj8L2+jkFy0/mCp VoN/tQPQucPk8mSVDfoh8X2Kh1E7QmTNMEtsc3iTXm+w/7IkakrVnQJVFjfYJwya 9/Us7t6qz7cutTrhIWO5kWoGrapUf3R3WZWuuHOHahRJhd2dpMBMFJZXLzGc/+xc 3I/KkAdRdUXD6ScMCxJgTpA+Wcuit8ZnqfyDSQmSatI5l7PnTiKQGorncTTEOPcJ 1ZJsZVy+6GTeeMy27hl12w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1710934877; x= 1711021277; bh=oQ7lrlPCMV4WZiz/Sou0AV8Vl9QDhV7S1tjB5+7c420=; b=T ZHlAslWdnomjADaIatSsXr1s1yh2ZipIfGSYJjLLUPWIbK+4rZYRSR6tnKPt3iUL Ttcw4t6AORad4dkuX6TgVPbQ42sLjdCSGnCM3JrXhcx9v5skvhyqzLWt6BbxybuJ /qAmjV0SAbYFQ9nNPqHZuoj1TM7XszeNRvQGaM+FizocXt8WzakbpL30VcW9f8h4 XuQ655BQSD/uiZkfxzN/T5oypIQmbXd58w0QAuCg6FrcpvQAJDpzIsnfPTGTgvrZ dzn/t4tprE/T9nDMrJU0NNtJVl74rIzsxAUH6orfOtEu+LII3Bf8a8VQejmB//F5 4ThZm/9EVxe7889bsJKKQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrleeggdefudcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkfgjfhgggfgtsehtqhertddttdejnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepgedttdeljeejgeffkeekkedtjeevtdehvedtkeeivdeuuedviedu vdelveejueejnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepthhhohhmrghssehmohhnjhgrlhhonhdrnhgvth X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 20 Mar 2024 07:41:15 -0400 (EDT) From: Thomas Monjalon To: Damodharam Ammepalli Cc: dev@dpdk.org, Dengdui Huang , ferruh.yigit@amd.com, aman.deep.singh@intel.com, yuying.zhang@intel.com, andrew.rybchenko@oktetlabs.ru, liuyonglong@huawei.com, fengchengwen@huawei.com, haijie1@huawei.com, lihuisong@huawei.com, ajit.khaparde@broadcom.com Subject: Re: [PATCH 0/3] support setting lanes Date: Wed, 20 Mar 2024 12:41:13 +0100 Message-ID: <3384256.usfYGdeWWP@thomas> In-Reply-To: References: <20240312075238.3319480-1-huangdengdui@huawei.com> <1759403.vCJZsxu672@thomas> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 18/03/2024 22:26, Damodharam Ammepalli: > On Mon, Mar 18, 2024 at 7:56=E2=80=AFAM Thomas Monjalon wrote: > > > > 12/03/2024 08:52, Dengdui Huang: > > > Some speeds can be achieved with different number of lanes. For examp= le, > > > 100Gbps can be achieved using two lanes of 50Gbps or four lanes of 25= Gbps. > > > When use different lanes, the port cannot be up. > > > > I'm not sure what you are referring to. > > I suppose it is not PCI lanes. > > Please could you link to an explanation of how a port is split in lanes? > > Which hardware does this? >=20 > This is a snapshot of 100Gb that the latest BCM576xx supports. > 100Gb (NRZ: 25G per lane, 4 lanes) link speed > 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed > 100Gb (PAM4-112: 100G per lane, 1 lane) link speed >=20 > Let the user feed in lanes=3D< integer value> and the NIC driver decides > the matching combination speed x lanes that works. In future if a new spe= ed > is implemented with more than 8 lanes, there wouldn't be a need > to touch this speed command. Using separate lane command would > be a better alternative to support already shipped products and only new > drivers would consider this lanes configuration, if applicable. Sorry it does not provide enough explanations. What is a lane? How does it work? Is it only for Broadcom devices? Do you know other devices?