From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 82034A04B6; Mon, 12 Oct 2020 11:29:02 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 36C2E1D6A5; Mon, 12 Oct 2020 11:29:01 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 25AF61D6A2 for ; Mon, 12 Oct 2020 11:28:57 +0200 (CEST) IronPort-SDR: lU6svaYOzX5poiLIE0PTlMQk0jQ0E5QCT1awA/XEEyYEF14PpSKgvccYjKhHxgwRsrfUL05ah1 81QDMiJ5n2tw== X-IronPort-AV: E=McAfee;i="6000,8403,9771"; a="165826006" X-IronPort-AV: E=Sophos;i="5.77,366,1596524400"; d="scan'208";a="165826006" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Oct 2020 02:28:57 -0700 IronPort-SDR: w7BG5iSVSxu25WkuWDK3dMmnRpLjjd+m7Dkk6eIWxxdc610HXCnhIwI0AG5oS+hwjkdc6+lHbH pZ85zhbHIjrg== X-IronPort-AV: E=Sophos;i="5.77,366,1596524400"; d="scan'208";a="344813151" Received: from aburakov-mobl.ger.corp.intel.com (HELO [10.213.195.67]) ([10.213.195.67]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Oct 2020 02:28:54 -0700 To: "Wang, Haiyue" , "dev@dpdk.org" Cc: "Ma, Liang J" , "Guo, Jia" , "Hunt, David" , "Ananyev, Konstantin" , "jerinjacobk@gmail.com" , "Richardson, Bruce" , "thomas@monjalon.net" , "McDaniel, Timothy" , "Eads, Gage" , "Macnamara, Chris" References: <1601647919-25312-1-git-send-email-liang.j.ma@intel.com> From: "Burakov, Anatoly" Message-ID: <34a3dc5e-88b9-75e5-4682-27ba01734746@intel.com> Date: Mon, 12 Oct 2020 10:28:52 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v5 06/10] net/ixgbe: implement power management API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 12-Oct-20 8:46 AM, Wang, Haiyue wrote: > Hi Liang, > >> -----Original Message----- >> From: Burakov, Anatoly >> Sent: Saturday, October 10, 2020 00:02 >> To: dev@dpdk.org >> Cc: Ma, Liang J ; Guo, Jia ; Wang, Haiyue >> ; Hunt, David ; Ananyev, Konstantin >> ; jerinjacobk@gmail.com; Richardson, Bruce ; >> thomas@monjalon.net; McDaniel, Timothy ; Eads, Gage ; >> Macnamara, Chris >> Subject: [PATCH v5 06/10] net/ixgbe: implement power management API >> >> From: Liang Ma >> >> Implement support for the power management API by implementing a >> `get_wake_addr` function that will return an address of an RX ring's >> status bit. >> >> Signed-off-by: Anatoly Burakov >> Signed-off-by: Liang Ma >> --- >> drivers/net/ixgbe/ixgbe_ethdev.c | 1 + >> drivers/net/ixgbe/ixgbe_rxtx.c | 22 ++++++++++++++++++++++ >> drivers/net/ixgbe/ixgbe_rxtx.h | 2 ++ >> 3 files changed, 25 insertions(+) >> >> diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c >> index 0b98e210e7..30b3f416d4 100644 >> --- a/drivers/net/ixgbe/ixgbe_ethdev.c >> +++ b/drivers/net/ixgbe/ixgbe_ethdev.c >> @@ -588,6 +588,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = { >> .udp_tunnel_port_del = ixgbe_dev_udp_tunnel_port_del, >> .tm_ops_get = ixgbe_tm_ops_get, >> .tx_done_cleanup = ixgbe_dev_tx_done_cleanup, >> +.get_wake_addr = ixgbe_get_wake_addr, >> }; >> >> /* >> diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c >> index 977ecf5137..7a9fd2aec6 100644 >> --- a/drivers/net/ixgbe/ixgbe_rxtx.c >> +++ b/drivers/net/ixgbe/ixgbe_rxtx.c >> @@ -1366,6 +1366,28 @@ const uint32_t >> RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP, >> }; >> >> +int ixgbe_get_wake_addr(void *rx_queue, volatile void **tail_desc_addr, >> +uint64_t *expected, uint64_t *mask) >> +{ >> +volatile union ixgbe_adv_rx_desc *rxdp; >> +struct ixgbe_rx_queue *rxq = rx_queue; >> +uint16_t desc; >> + >> +desc = rxq->rx_tail; >> +rxdp = &rxq->rx_ring[desc]; >> +/* watch for changes in status bit */ >> +*tail_desc_addr = &rxdp->wb.upper.status_error; >> + >> +/* >> + * we expect the DD bit to be set to 1 if this descriptor was already >> + * written to. >> + */ >> +*expected = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD); >> +*mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD); >> + >> +return 0; >> +} >> + > > I'm wondering that whether the '.get_wake_addr' can be specific to > like 'rxq_tailq_addr_get' ? So that one day this wake up mechanism > can be applied to 'txq_tailq_addr_get' ? :-) > > Also, "volatile void **tail_desc_addr, uint64_t *expected, uint64_t *mask" > can be merged into 'struct xxx' ? So that you can expand the API easily. > > Just my thoughts. > > Anyway, LGTM > > Acked-by: Haiyue Wang Great point, will think of how to address it. > >> -- >> 2.17.1 -- Thanks, Anatoly