From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B39C7A0547; Mon, 21 Jun 2021 03:17:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4C0EF40040; Mon, 21 Jun 2021 03:17:49 +0200 (CEST) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id C5DAD4003F for ; Mon, 21 Jun 2021 03:17:47 +0200 (CEST) Received: from dggemv704-chm.china.huawei.com (unknown [172.30.72.54]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4G7Wln5gv2zZjNj; Mon, 21 Jun 2021 09:14:45 +0800 (CST) Received: from dggpeml500024.china.huawei.com (7.185.36.10) by dggemv704-chm.china.huawei.com (10.3.19.47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 21 Jun 2021 09:17:44 +0800 Received: from [127.0.0.1] (10.40.190.165) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 21 Jun 2021 09:17:44 +0800 From: fengchengwen To: , , Honnappa Nagarahalli CC: , , , , References: <1621568034-29269-1-git-send-email-fengchengwen@huawei.com> Message-ID: <355cebad-c548-cd08-969d-6c249cd9cac7@huawei.com> Date: Mon, 21 Jun 2021 09:17:43 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <1621568034-29269-1-git-send-email-fengchengwen@huawei.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.40.190.165] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggpeml500024.china.huawei.com (7.185.36.10) X-CFilter-Loop: Reflected Subject: Re: [dpdk-dev] [PATCH] config/arm: add checking SVE cpuflag X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, ARM guys, Thomas Could you help review this patch ? Thanks On 2021/5/21 11:33, Chengwen Feng wrote: > If compiled with SVE feature (e.g. "-march=armv8.2-a+sve'), the binary > could not run on non-SVE platform else it will encounter illegal > instruction [1]. > > This patch fixes it by add 'RTE_CPUFLAG_SVE' to compile_time_cpuflags, > so that rte_cpu_is_supported() will print meaningful log under above > situation. > > [1] http://mails.dpdk.org/archives/dev/2021-May/209124.html > > Signed-off-by: Chengwen Feng > --- > config/arm/meson.build | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/config/arm/meson.build b/config/arm/meson.build > index e83a56e..9b147c0 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -480,6 +480,10 @@ if (cc.get_define('__ARM_NEON', args: machine_args) != '' or > compile_time_cpuflags += ['RTE_CPUFLAG_NEON'] > endif > > +if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' > + compile_time_cpuflags += ['RTE_CPUFLAG_SVE'] > +endif > + > if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != '' > compile_time_cpuflags += ['RTE_CPUFLAG_CRC32'] > endif >