From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A1E7EA04BC; Fri, 9 Oct 2020 02:19:07 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EA4FF1BCE8; Fri, 9 Oct 2020 02:19:05 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id D28121BCB6 for ; Fri, 9 Oct 2020 02:19:03 +0200 (CEST) IronPort-SDR: 6oRw22kqIjXctapsmwvYe2zbyW/++PQWuhT+C2m/DVw3W512UCogl8FeKkoz3X2o1QZs5O295m fSom4JpMPQRg== X-IronPort-AV: E=McAfee;i="6000,8403,9768"; a="227071900" X-IronPort-AV: E=Sophos;i="5.77,353,1596524400"; d="scan'208";a="227071900" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2020 17:19:01 -0700 IronPort-SDR: aZPX1tEytsYRcT1K6N99i5w2pdwLdnxxO/JbG3oZrac29oWlwi27FgDIze7FnQQnrlPkdmiqQb FRN2zcvxWBag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,353,1596524400"; d="scan'208";a="419263834" Received: from fmsmsx604.amr.corp.intel.com ([10.18.126.84]) by fmsmga001.fm.intel.com with ESMTP; 08 Oct 2020 17:19:01 -0700 Received: from shsmsx605.ccr.corp.intel.com (10.109.6.215) by fmsmsx604.amr.corp.intel.com (10.18.126.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Thu, 8 Oct 2020 17:19:00 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX605.ccr.corp.intel.com (10.109.6.215) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 9 Oct 2020 08:18:58 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.1713.004; Fri, 9 Oct 2020 08:18:58 +0800 From: "Zhang, Qi Z" To: "Power, Ciara" , "dev@dpdk.org" CC: "Wang, Xiao W" Thread-Topic: [PATCH v3 08/18] net/fm10k: add checks for max SIMD bitwidth Thread-Index: AQHWlyrCK9qJI0IPw0ei25TWvr/Tl6mOdSSQ Date: Fri, 9 Oct 2020 00:18:58 +0000 Message-ID: <3781892116f847a68197fa6ea250a870@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200930130415.11211-1-ciara.power@intel.com> <20200930130415.11211-9-ciara.power@intel.com> In-Reply-To: <20200930130415.11211-9-ciara.power@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 08/18] net/fm10k: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Power, Ciara > Sent: Wednesday, September 30, 2020 9:04 PM > To: dev@dpdk.org > Cc: Power, Ciara ; Zhang, Qi Z > ; Wang, Xiao W > Subject: [PATCH v3 08/18] net/fm10k: add checks for max SIMD bitwidth >=20 > When choosing a vector path to take, an extra condition must be satisfied= to > ensure the max SIMD bitwidth allows for the CPU enabled path. >=20 > Cc: Qi Zhang > Cc: Xiao Wang >=20 > Signed-off-by: Ciara Power Acked-by: Qi Zhang > --- > drivers/net/fm10k/fm10k_ethdev.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) >=20 > diff --git a/drivers/net/fm10k/fm10k_ethdev.c > b/drivers/net/fm10k/fm10k_ethdev.c > index 5771d83b55..a8bc1036a3 100644 > --- a/drivers/net/fm10k/fm10k_ethdev.c > +++ b/drivers/net/fm10k/fm10k_ethdev.c > @@ -2930,7 +2930,9 @@ fm10k_set_tx_function(struct rte_eth_dev *dev) > if (rte_eal_process_type() !=3D RTE_PROC_PRIMARY) { > /* primary process has set the ftag flag and offloads */ > txq =3D dev->data->tx_queues[0]; > - if (fm10k_tx_vec_condition_check(txq)) { > + if (fm10k_tx_vec_condition_check(txq) || > + rte_get_max_simd_bitwidth() > + < RTE_MAX_128_SIMD) { > dev->tx_pkt_burst =3D fm10k_xmit_pkts; > dev->tx_pkt_prepare =3D fm10k_prep_pkts; > PMD_INIT_LOG(DEBUG, "Use regular Tx func"); @@ -2949,7 > +2951,8 @@ fm10k_set_tx_function(struct rte_eth_dev *dev) > txq =3D dev->data->tx_queues[i]; > txq->tx_ftag_en =3D tx_ftag_en; > /* Check if Vector Tx is satisfied */ > - if (fm10k_tx_vec_condition_check(txq)) > + if (fm10k_tx_vec_condition_check(txq) || > + rte_get_max_simd_bitwidth() < RTE_MAX_128_SIMD) > use_sse =3D 0; > } >=20 > @@ -2983,7 +2986,9 @@ fm10k_set_rx_function(struct rte_eth_dev *dev) > * conditions to be met. > */ > if (!fm10k_rx_vec_condition_check(dev) && > - dev_info->rx_vec_allowed && !rx_ftag_en) { > + dev_info->rx_vec_allowed && !rx_ftag_en && > + rte_get_max_simd_bitwidth() > + >=3D RTE_MAX_128_SIMD) { > if (dev->data->scattered_rx) > dev->rx_pkt_burst =3D fm10k_recv_scattered_pkts_vec; > else > -- > 2.17.1