* [dpdk-dev] [PATCH 1/2] cxgbe: update supported port module types
2017-06-28 4:37 [dpdk-dev] [PATCH 0/2] cxgbe: fix supported speed capabilities Rahul Lakkireddy
@ 2017-06-28 4:37 ` Rahul Lakkireddy
2017-06-28 4:37 ` [dpdk-dev] [PATCH 2/2] cxgbe: fix supported speed capabilities Rahul Lakkireddy
2017-06-28 12:06 ` [dpdk-dev] [PATCH 0/2] " Ferruh Yigit
2 siblings, 0 replies; 4+ messages in thread
From: Rahul Lakkireddy @ 2017-06-28 4:37 UTC (permalink / raw)
To: dev
Cc: Martin Weiser, Kumar Sanghvi, Nirranjan Kirubaharan, Indranil Choudhury
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
---
drivers/net/cxgbe/base/t4fw_interface.h | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/net/cxgbe/base/t4fw_interface.h b/drivers/net/cxgbe/base/t4fw_interface.h
index 6283fe9..6ca4f31 100644
--- a/drivers/net/cxgbe/base/t4fw_interface.h
+++ b/drivers/net/cxgbe/base/t4fw_interface.h
@@ -1293,15 +1293,12 @@ enum fw_port_type {
FW_PORT_TYPE_QSFP = 14, /* No, 4, Yes, No, No, No, 40G */
FW_PORT_TYPE_BP40_BA = 15,
/* No, 4, No, No, Yes, Yes, 40G/10G/1G, BP ANGE */
- FW_PORT_TYPE_KR4_100G = 16, /* No, 4, 100G*/
- FW_PORT_TYPE_CR4_QSFP = 17, /* No, 4, 100G*/
- FW_PORT_TYPE_CR4_CFP4 = 18, /* No, 4, 100G*/
- FW_PORT_TYPE_CR_QSFP = 19, /* No, 1, 25G*/
- FW_PORT_TYPE_CR_CFP4 = 20, /* No, 1, 25G*/
- FW_PORT_TYPE_CR2_QSFP = 21, /* No, 2, 50G*/
- FW_PORT_TYPE_CR2_CFP4 = 22, /* No, 2, 50G*/
- FW_PORT_TYPE_SFP28 = 23, /* No, 1, 25G*/
-
+ FW_PORT_TYPE_KR4_100G = 16, /* No, 4, 100G/40G/25G, Backplane */
+ FW_PORT_TYPE_CR4_QSFP = 17, /* No, 4, 100G/40G/25G */
+ FW_PORT_TYPE_CR_QSFP = 18, /* No, 1, 25G Spider cable */
+ FW_PORT_TYPE_CR2_QSFP = 19, /* No, 2, 50G */
+ FW_PORT_TYPE_SFP28 = 20, /* No, 1, 25G/10G/1G */
+ FW_PORT_TYPE_KR_SFP28 = 21, /* No, 1, 25G/10G/1G using Backplane */
FW_PORT_TYPE_NONE = M_FW_PORT_CMD_PTYPE
};
--
2.5.3
^ permalink raw reply [flat|nested] 4+ messages in thread* [dpdk-dev] [PATCH 2/2] cxgbe: fix supported speed capabilities
2017-06-28 4:37 [dpdk-dev] [PATCH 0/2] cxgbe: fix supported speed capabilities Rahul Lakkireddy
2017-06-28 4:37 ` [dpdk-dev] [PATCH 1/2] cxgbe: update supported port module types Rahul Lakkireddy
@ 2017-06-28 4:37 ` Rahul Lakkireddy
2017-06-28 12:06 ` [dpdk-dev] [PATCH 0/2] " Ferruh Yigit
2 siblings, 0 replies; 4+ messages in thread
From: Rahul Lakkireddy @ 2017-06-28 4:37 UTC (permalink / raw)
To: dev
Cc: Martin Weiser, Kumar Sanghvi, Nirranjan Kirubaharan, Indranil Choudhury
Use port type to determine the supported speed capabilities.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
---
doc/guides/nics/features/cxgbe.ini | 2 +-
drivers/net/cxgbe/cxgbe.h | 1 +
drivers/net/cxgbe/cxgbe_ethdev.c | 2 +-
drivers/net/cxgbe/cxgbe_main.c | 104 +++++++++++++++++++++++++++++++++++++
4 files changed, 107 insertions(+), 2 deletions(-)
diff --git a/doc/guides/nics/features/cxgbe.ini b/doc/guides/nics/features/cxgbe.ini
index 2cf0af3..3d0fde2 100644
--- a/doc/guides/nics/features/cxgbe.ini
+++ b/doc/guides/nics/features/cxgbe.ini
@@ -4,7 +4,7 @@
; Refer to default.ini for the full list of available PMD features.
;
[Features]
-Speed capabilities = P
+Speed capabilities = Y
Link status = Y
Queue start/stop = Y
MTU update = Y
diff --git a/drivers/net/cxgbe/cxgbe.h b/drivers/net/cxgbe/cxgbe.h
index 9120c43..f989154 100644
--- a/drivers/net/cxgbe/cxgbe.h
+++ b/drivers/net/cxgbe/cxgbe.h
@@ -47,6 +47,7 @@
#define CXGBE_MAX_RX_PKTLEN (9000 + ETHER_HDR_LEN + ETHER_CRC_LEN) /* max pkt */
int cxgbe_probe(struct adapter *adapter);
+void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps);
int cxgbe_up(struct adapter *adap);
int cxgbe_down(struct port_info *pi);
void cxgbe_close(struct adapter *adapter);
diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c
index b622d25..981dd47 100644
--- a/drivers/net/cxgbe/cxgbe_ethdev.c
+++ b/drivers/net/cxgbe/cxgbe_ethdev.c
@@ -175,7 +175,7 @@ static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
device_info->rx_desc_lim = cxgbe_desc_lim;
device_info->tx_desc_lim = cxgbe_desc_lim;
- device_info->speed_capa = ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G;
+ cxgbe_get_speed_caps(pi, &device_info->speed_capa);
}
static void cxgbe_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
diff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c
index eead7c0..0edac2b 100644
--- a/drivers/net/cxgbe/cxgbe_main.c
+++ b/drivers/net/cxgbe/cxgbe_main.c
@@ -1034,6 +1034,110 @@ void cxgbe_enable_rx_queues(struct port_info *pi)
}
/**
+ * fw_caps_to_speed_caps - translate Firmware Port Caps to Speed Caps.
+ * @port_type: Firmware Port Type
+ * @fw_caps: Firmware Port Capabilities
+ * @speed_caps: Device Info Speed Capabilities
+ *
+ * Translate a Firmware Port Capabilities specification to Device Info
+ * Speed Capabilities.
+ */
+static void fw_caps_to_speed_caps(enum fw_port_type port_type,
+ unsigned int fw_caps,
+ u32 *speed_caps)
+{
+#define SET_SPEED(__speed_name) \
+ do { \
+ *speed_caps |= ETH_LINK_ ## __speed_name; \
+ } while (0)
+
+#define FW_CAPS_TO_SPEED(__fw_name) \
+ do { \
+ if (fw_caps & FW_PORT_CAP_ ## __fw_name) \
+ SET_SPEED(__fw_name); \
+ } while (0)
+
+ switch (port_type) {
+ case FW_PORT_TYPE_BT_SGMII:
+ case FW_PORT_TYPE_BT_XFI:
+ case FW_PORT_TYPE_BT_XAUI:
+ FW_CAPS_TO_SPEED(SPEED_100M);
+ FW_CAPS_TO_SPEED(SPEED_1G);
+ FW_CAPS_TO_SPEED(SPEED_10G);
+ break;
+
+ case FW_PORT_TYPE_KX4:
+ case FW_PORT_TYPE_KX:
+ case FW_PORT_TYPE_FIBER_XFI:
+ case FW_PORT_TYPE_FIBER_XAUI:
+ case FW_PORT_TYPE_SFP:
+ case FW_PORT_TYPE_QSFP_10G:
+ case FW_PORT_TYPE_QSA:
+ FW_CAPS_TO_SPEED(SPEED_1G);
+ FW_CAPS_TO_SPEED(SPEED_10G);
+ break;
+
+ case FW_PORT_TYPE_KR:
+ SET_SPEED(SPEED_10G);
+ break;
+
+ case FW_PORT_TYPE_BP_AP:
+ case FW_PORT_TYPE_BP4_AP:
+ SET_SPEED(SPEED_1G);
+ SET_SPEED(SPEED_10G);
+ break;
+
+ case FW_PORT_TYPE_BP40_BA:
+ case FW_PORT_TYPE_QSFP:
+ SET_SPEED(SPEED_40G);
+ break;
+
+ case FW_PORT_TYPE_CR_QSFP:
+ case FW_PORT_TYPE_SFP28:
+ case FW_PORT_TYPE_KR_SFP28:
+ FW_CAPS_TO_SPEED(SPEED_1G);
+ FW_CAPS_TO_SPEED(SPEED_10G);
+ FW_CAPS_TO_SPEED(SPEED_25G);
+ break;
+
+ case FW_PORT_TYPE_CR2_QSFP:
+ SET_SPEED(SPEED_50G);
+ break;
+
+ case FW_PORT_TYPE_KR4_100G:
+ case FW_PORT_TYPE_CR4_QSFP:
+ FW_CAPS_TO_SPEED(SPEED_25G);
+ FW_CAPS_TO_SPEED(SPEED_40G);
+ FW_CAPS_TO_SPEED(SPEED_100G);
+ break;
+
+ default:
+ break;
+ }
+
+#undef FW_CAPS_TO_SPEED
+#undef SET_SPEED
+}
+
+/**
+ * cxgbe_get_speed_caps - Fetch supported speed capabilities
+ * @pi: Underlying port's info
+ * @speed_caps: Device Info speed capabilities
+ *
+ * Fetch supported speed capabilities of the underlying port.
+ */
+void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps)
+{
+ *speed_caps = 0;
+
+ fw_caps_to_speed_caps(pi->port_type, pi->link_cfg.supported,
+ speed_caps);
+
+ if (!(pi->link_cfg.supported & FW_PORT_CAP_ANEG))
+ *speed_caps |= ETH_LINK_SPEED_FIXED;
+}
+
+/**
* cxgb_up - enable the adapter
* @adap: adapter being enabled
*
--
2.5.3
^ permalink raw reply [flat|nested] 4+ messages in thread