From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4089FA00C5; Mon, 6 Jul 2020 19:28:29 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 26F081DB0A; Mon, 6 Jul 2020 19:28:29 +0200 (CEST) Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id 0418D1DA16 for ; Mon, 6 Jul 2020 19:28:27 +0200 (CEST) Received: from compute7.internal (compute7.nyi.internal [10.202.2.47]) by mailout.nyi.internal (Postfix) with ESMTP id 886D05C01DD; Mon, 6 Jul 2020 13:28:27 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute7.internal (MEProxy); Mon, 06 Jul 2020 13:28:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= Tkww7CYf9RJ8mlIGcNRct+eUyxSj+T60PwWTBRqWs4E=; b=ww2Zv/B1R9lZysPI 2jTkwUzCcMc98wKH3uVoW5tBQ5uSjjj0QKnBPwZIe1haD0EppJse3Y3YF5HeH6LG smum+tJ+mOT7OLmbpQrtSS9r2EYhOFB4PEcm1P4FODwz5sDWYIt9siIWZdGhe0wm 6bk7PBOTKe1DgRrJFRHX5OAT6BJWlpz4KsNRsCE14sdSFOzEP9RufaGez4kGOetO UuBBY6Pr6jkVChtRp8Ak+WNk/jmrSASOy6D6l74hlbABqkZsE9LbHWxvC1fIu7qK T6ZH6bEUHL0hhjVcGua8Zp6xASYNBFXkvosbmTs0GML6vGAnq0oHFHtYQgQrRz1r 5l81NA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=Tkww7CYf9RJ8mlIGcNRct+eUyxSj+T60PwWTBRqWs 4E=; b=u0aMtymTFZP6tlnRSVzFDxGUFCF7ZeBNGaiO5Nf4uG/upkc3cQ2OE0S4C FWzCNJNyDb/P6Y939BMi7U4svKjxg0F5NGqn5KRSLqWNB/tdYQFlBkPVe08dqCeL yTrAhJTCgNhrtJVuUAgtdthFl++hXhoEV6I24l+ws3v4tUfa0aRXp+QBYQHBp73J gSnG9SVrCHX0ImBTzFjc9OR8nAgQ+GlwVXDoi3xX0J0ZDT627HdQ1QJzwX1GVjJ9 qx5RKFr+BRpgNUO81MA4Q5PrLsC//RxgMZroFwrER/17YbFhxN5n4Zw8KK69ISxA TvVAeR2zPuZkZ4up2+K9ij6Yp4JyQ== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduiedrudefgdduudehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkfgjfhgggfgtsehtufertddttddvnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepudeggfdvfeduffdtfeeglefghfeukefgfffhueejtdetuedtjeeu ieeivdffgeehnecukfhppeejjedrudefgedrvddtfedrudekgeenucevlhhushhtvghruf hiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehthhhomhgrshesmhhonhhjrghl ohhnrdhnvght X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id 955E33280069; Mon, 6 Jul 2020 13:28:26 -0400 (EDT) From: Thomas Monjalon To: Vladimir Medvedkin Cc: dev@dpdk.org, konstantin.ananyev@intel.com, bruce.richardson@intel.com Date: Mon, 06 Jul 2020 19:28:25 +0200 Message-ID: <398516435.EbZMn01dnC@thomas> In-Reply-To: <895e07b9a83234251f3a6b6a43dc360ee9b7edc6.1589890262.git.vladimir.medvedkin@intel.com> References: <895e07b9a83234251f3a6b6a43dc360ee9b7edc6.1589890262.git.vladimir.medvedkin@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v3 1/8] eal: introduce zmm type for AVX 512-bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 19/05/2020 14:12, Vladimir Medvedkin: > New data type to manipulate 512 bit AVX values. [...] > +typedef union __rte_x86_zmm { > + __x86_zmm_t z; > + ymm_t y[ZMM_SIZE / sizeof(ymm_t)]; > + xmm_t x[ZMM_SIZE / sizeof(xmm_t)]; > + uint8_t u8[ZMM_SIZE / sizeof(uint8_t)]; > + uint16_t u16[ZMM_SIZE / sizeof(uint16_t)]; > + uint32_t u32[ZMM_SIZE / sizeof(uint32_t)]; > + uint64_t u64[ZMM_SIZE / sizeof(uint64_t)]; > + double pd[ZMM_SIZE / sizeof(double)]; > +} __attribute__((__aligned__(ZMM_SIZE))) __rte_x86_zmm_t; Should be __rte_aligned(ZMM_SIZE)