From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id DC6DDFE5 for ; Wed, 31 Aug 2016 19:29:48 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP; 31 Aug 2016 10:29:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,263,1470726000"; d="scan'208";a="1049762465" Received: from irsmsx101.ger.corp.intel.com ([163.33.3.153]) by fmsmga002.fm.intel.com with ESMTP; 31 Aug 2016 10:29:47 -0700 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.71]) by IRSMSX101.ger.corp.intel.com ([169.254.1.183]) with mapi id 14.03.0248.002; Wed, 31 Aug 2016 18:29:45 +0100 From: "Dumitrescu, Cristian" To: Gowrishankar Muthukrishnan , "dev@dpdk.org" CC: Chao Zhu , "Richardson, Bruce" , "Ananyev, Konstantin" , Thomas Monjalon , Pradeep Thread-Topic: [PATCH v6 9/9] table: align rte table hash structs for cache line size Thread-Index: AQHR96j6GxoeAj4fkk6+6IE8qxZgAqBjZAtA Date: Wed, 31 Aug 2016 17:29:45 +0000 Message-ID: <3EB4FA525960D640B5BDFFD6A3D8912647A547BE@IRSMSX108.ger.corp.intel.com> References: <1471343279-24014-1-git-send-email-gowrishankar.m@linux.vnet.ibm.com> <1471343279-24014-10-git-send-email-gowrishankar.m@linux.vnet.ibm.com> In-Reply-To: <1471343279-24014-10-git-send-email-gowrishankar.m@linux.vnet.ibm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOGNiZmM3ZTQtNzZkZi00YTJjLTkwYWYtY2YxMTM0N2UxMDBiIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IkdMaG1pdUV1N0JPNFVCNEVIM0lRWlwvQlRNMnc5Vzd5UzEzWG5oUnZwQ2l3PSJ9 x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v6 9/9] table: align rte table hash structs for cache line size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Aug 2016 17:29:49 -0000 > -----Original Message----- > From: Gowrishankar Muthukrishnan > [mailto:gowrishankar.m@linux.vnet.ibm.com] > Sent: Tuesday, August 16, 2016 11:28 AM > To: dev@dpdk.org > Cc: Chao Zhu ; Richardson, Bruce > ; Ananyev, Konstantin > ; Thomas Monjalon > ; Dumitrescu, Cristian > ; Pradeep > Subject: [PATCH v6 9/9] table: align rte table hash structs for cache lin= e size >=20 > rte table hash structs rte_bucket_4_8, rte_bucket_4_16 and > rte_bucket_4_32 have > to be cache aligned as required by their corresponding hash create functi= ons > rte_table_hash_create_key8_lru etc. >=20 > Signed-off-by: Gowrishankar Muthukrishnan > > --- > lib/librte_table/rte_table_hash_key16.c | 4 ++-- > lib/librte_table/rte_table_hash_key32.c | 4 ++-- > lib/librte_table/rte_table_hash_key8.c | 2 +- > 3 files changed, 5 insertions(+), 5 deletions(-) >=20 > diff --git a/lib/librte_table/rte_table_hash_key16.c > b/lib/librte_table/rte_table_hash_key16.c > index b7e000f..2102326 100644 > --- a/lib/librte_table/rte_table_hash_key16.c > +++ b/lib/librte_table/rte_table_hash_key16.c > @@ -68,10 +68,10 @@ struct rte_bucket_4_16 { > uint64_t next_valid; >=20 > /* Cache line 1 */ > - uint64_t key[4][2]; > + uint64_t key[4][2] __rte_cache_aligned; >=20 > /* Cache line 2 */ > - uint8_t data[0]; > + uint8_t data[0] __rte_cache_aligned; > }; >=20 > struct rte_table_hash { > diff --git a/lib/librte_table/rte_table_hash_key32.c > b/lib/librte_table/rte_table_hash_key32.c > index a7aba49..619f63a 100644 > --- a/lib/librte_table/rte_table_hash_key32.c > +++ b/lib/librte_table/rte_table_hash_key32.c > @@ -68,10 +68,10 @@ struct rte_bucket_4_32 { > uint64_t next_valid; >=20 > /* Cache lines 1 and 2 */ > - uint64_t key[4][4]; > + uint64_t key[4][4] __rte_cache_aligned; >=20 > /* Cache line 3 */ > - uint8_t data[0]; > + uint8_t data[0] __rte_cache_aligned; > }; >=20 > struct rte_table_hash { > diff --git a/lib/librte_table/rte_table_hash_key8.c > b/lib/librte_table/rte_table_hash_key8.c > index e2e2bdc..4d5e0cd 100644 > --- a/lib/librte_table/rte_table_hash_key8.c > +++ b/lib/librte_table/rte_table_hash_key8.c > @@ -68,7 +68,7 @@ struct rte_bucket_4_8 { > uint64_t key[4]; >=20 > /* Cache line 1 */ > - uint8_t data[0]; > + uint8_t data[0] __rte_cache_aligned; > }; >=20 > struct rte_table_hash { > -- > 1.9.1 Hi Gowrishankar, My understanding is you are trying to work around the check invoked by the = hash table create functions that verifies the size of the bucket header str= ucture is a multiple of the cache line, right? Given that the size of this structure is 1x, 2x or 3x times 64 bytes, the c= heck passes on IA CPUs (cache line of 64 bytes; explicit alignment to cache= line size is not needed in order to make the size of the structure a multi= ple of cache line), but not on PPC CPUs (cache line of 128 bytes), correct? I don't think your proposal provides the best way to fix this issue, since = your code leads to a considerable increase in the memory consumption used p= er bucket in most cases: - 100% more memory for 8-byte key hash table - 0% more for 16-byte key hash table (code does not fix anything, explicit= alignment is not needed) - 50% more for 32-byte key hash table I suggest you simply change the check: instead of validating this data stru= cture is a multiple of cache line size, validate it is a multiple of 64 byt= es. Regards, Cristian