From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 8D3B61075 for ; Thu, 16 Mar 2017 17:24:01 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489681442; x=1521217442; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=dVqI9OuRekAvMQ5BlnunR7WjY3qCCp4/zD5IKVtOef8=; b=bC0AbsZzGLP1qjndWTvKVBmAT6svNUkfqFlSYAND8VJuawyfc4jHXk/Z Fkf0/ajdNXO0nhyBSP2StJtCw3AVHQ==; Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Mar 2017 09:24:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,173,1486454400"; d="scan'208";a="835537746" Received: from irsmsx152.ger.corp.intel.com ([163.33.192.66]) by FMSMGA003.fm.intel.com with ESMTP; 16 Mar 2017 09:23:59 -0700 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.173]) by IRSMSX152.ger.corp.intel.com ([169.254.6.125]) with mapi id 14.03.0248.002; Thu, 16 Mar 2017 16:23:58 +0000 From: "Dumitrescu, Cristian" To: Thomas Monjalon CC: "O'Driscoll, Tim" , "dev@dpdk.org" , "jerin.jacob@caviumnetworks.com" , "balasubramanian.manoharan@cavium.com" , "hemant.agrawal@nxp.com" , "shreyansh.jain@nxp.com" , "Wiles, Keith" , "Richardson, Bruce" Thread-Topic: [PATCH v3 2/2] ethdev: add hierarchical scheduler API Thread-Index: AQHSlmXkX5aIvTYL1U6GZzZccGSDv6GIAuLQgAA63gCAAYJR4IAA9luAgAOvgTCAB4DRgIABtthg Date: Thu, 16 Mar 2017 16:23:58 +0000 Message-ID: <3EB4FA525960D640B5BDFFD6A3D8912652761170@IRSMSX108.ger.corp.intel.com> References: <1488589820-206947-1-git-send-email-cristian.dumitrescu@intel.com> <26FA93C7ED1EAA44AB77D62FBE1D27BA7231952B@IRSMSX108.ger.corp.intel.com> <3EB4FA525960D640B5BDFFD6A3D891265275E105@IRSMSX108.ger.corp.intel.com> <106399437.xFH6ZF6NRJ@xps13> In-Reply-To: <106399437.xFH6ZF6NRJ@xps13> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMjU2Y2ZmMDMtNWQ0ZS00ZWUxLTkwZWYtNTQ2YzJkOTYzY2Y4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IkxOZ2VsU090b2xIMFZuN1Axa1wvNHdoaU83MlZ3VTZJQzEzdFFyRWp2MFFZPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 2/2] ethdev: add hierarchical scheduler API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Mar 2017 16:24:02 -0000 ... > > Thomas, given Tim's confirmation of Intel's plans to implement this API= for > the ixgbe and i40e drivers in DPDK release 17.8, are you in favour of inc= luding > this API in 17.5 with experimental tag (subject to full API agreement bei= ng > reached)? >=20 > I think starting a branch in a dedicated "next" repo is a better approach= . > rte_flow and eventdev were (and will be) integrated only when at least on= e > hardware device is supported. > I suggest to follow the same workflow. >=20 Thomas, if this is the only path forward you are willing to support, then l= et's go this way, but let's make sure we are all on the same page with the = terms and conditions that apply. Do you agree now to merge this next-tree to DPDK once this API is implement= ed for at least one PMD? We would like to avoid getting any last minute obj= ections from you or anybody else on the fundamentals; if you have any, plea= se let's discuss them now. How do we manage the API freeze on the next-tree? Once the API is agreed, w= e would like to freeze it so the driver development can proceed; we can the= n do some reasonably small changes to the API based on the learnings we get= during driver development. We would like to welcome any parties interested= in contributing to join Cavium, Intel and NXP in this effort, but we would= like to avoid any last minute major API change requests.