From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1B7EDA2F6B for ; Tue, 8 Oct 2019 17:19:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B85B21C08E; Tue, 8 Oct 2019 17:19:10 +0200 (CEST) Received: from huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 77761322C for ; Tue, 8 Oct 2019 17:19:09 +0200 (CEST) Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 5B26325E3C8E1E1BF1C9 for ; Tue, 8 Oct 2019 23:19:08 +0800 (CST) Received: from [127.0.0.1] (10.177.29.98) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Tue, 8 Oct 2019 23:19:02 +0800 To: Ferruh Yigit CC: , , , , , , References: <8dea773bd37c783e349692afae166cfa1cf9a8b5.1569850827.git.cloud.wangxiaoyun@huawei.com> <8413ef98-5988-4230-350a-49a377805517@intel.com> From: "Wangxiaoyun (Cloud, Network Chip Application Development Dept)" Message-ID: <3abbfdf6-e0a1-e226-bd95-e37a566e312b@huawei.com> Date: Tue, 8 Oct 2019 23:19:01 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <8413ef98-5988-4230-350a-49a377805517@intel.com> X-Originating-IP: [10.177.29.98] X-CFilter-Loop: Reflected Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] [PATCH v3 18/19] net/hinic: optimize RX performance X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Ferruh, Thanks for your comments. I think you're right, i will modify it with Patch V4. Also I change it with the same structure for X86-64 and ARM platform with cache-aligned, and test the RX performance, all is OK. Best Regards Xiaoyun Wang 在 2019/9/30 23:10, Ferruh Yigit 写道: > On 9/30/2019 3:00 PM, Xiaoyun wang wrote: >> This patch optimizes receive packets performance >> on arm platform. >> >> Signed-off-by: Xiaoyun wang > <...> > >> @@ -28,6 +28,7 @@ struct hinic_rq_ctrl { >> u32 ctrl_fmt; >> }; >> >> +#if defined(__X86_64_SSE__) >> struct hinic_rq_cqe { >> u32 status; >> u32 vlan_len; >> @@ -36,6 +37,16 @@ struct hinic_rq_cqe { >> >> u32 rsvd[4]; >> }; >> +#elif defined(__ARM64_NEON__) >> +struct hinic_rq_cqe { >> + u32 status; >> + u32 vlan_len; >> + u32 offload_type; >> + u32 rss_hash; >> + >> + u32 rsvd[4]; >> +} __rte_cache_aligned; >> +#endif > This change makes "struct hinic_rq_cqe" only exist for 'x86_64' and 'ARM64', if > the intention is to add '__rte_cache_aligned' for the neon, would following > work, which will also work for all archs: > > > struct hinic_rq_cqe { > u32 status; > u32 vlan_len; > u32 offload_type; > u32 rss_hash; > > u32 rsvd[4]; > #if defined(__ARM64_NEON__) > } __rte_cache_aligned; > #else > }; > #endif > > If this works, can you please send a new version with this update? >