From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 689C4568E for ; Fri, 29 Jul 2016 09:11:58 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP; 29 Jul 2016 00:11:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,438,1464678000"; d="scan'208";a="1004725113" Received: from shwdeisgchi083.ccr.corp.intel.com (HELO [10.239.67.193]) ([10.239.67.193]) by orsmga001.jf.intel.com with ESMTP; 29 Jul 2016 00:11:56 -0700 To: dev@dpdk.org References: <1467865627-23524-1-git-send-email-zhe.tao@intel.com> <1468843009-14517-1-git-send-email-zhe.tao@intel.com> Cc: "Ananyev, Konstantin" , jingjing.wu@intel.com From: "Tan, Jianfeng" Message-ID: <3d08c8b3-fc33-ddbc-196b-c43a65d5779f@intel.com> Date: Fri, 29 Jul 2016 15:11:55 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1468843009-14517-1-git-send-email-zhe.tao@intel.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v3] i40: fix the VXLAN TSO issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jul 2016 07:11:58 -0000 Hi, On 7/18/2016 7:56 PM, Zhe Tao wrote: > Problem: > When using the TSO + VXLAN feature in i40e, the outer UDP length fields in > the multiple UDP segments which are TSOed by the i40e will have a > wrong value. > > Fix this problem by adding the tunnel type field in the i40e descriptor > which was missed before. > > Fixes: 77b8301733c3 ("i40e: VXLAN Tx checksum offload") > > Signed-off-by: Zhe Tao > --- > v2: edited the comments > v3: added external IP offload flag when TSO is enabled for tunnelling packets > > app/test-pmd/csumonly.c | 29 +++++++++++++++++++++-------- > drivers/net/i40e/i40e_rxtx.c | 12 +++++++++--- > lib/librte_mbuf/rte_mbuf.h | 16 +++++++++++++++- > 3 files changed, 45 insertions(+), 12 deletions(-) > ... > diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h > index 15e3a10..90812ea 100644 > --- a/lib/librte_mbuf/rte_mbuf.h > +++ b/lib/librte_mbuf/rte_mbuf.h > @@ -133,6 +133,17 @@ extern "C" { > /* add new TX flags here */ > > /** > + * Bits 45:48 used for the tunnel type. > + * When doing Tx offload like TSO or checksum, the HW needs to configure the > + * tunnel type into the HW descriptors. > + */ > +#define PKT_TX_TUNNEL_VXLAN (1ULL << 45) > +#define PKT_TX_TUNNEL_GRE (2ULL << 45) > +#define PKT_TX_TUNNEL_IPIP (3ULL << 45) > +/* add new TX TUNNEL type here */ > +#define PKT_TX_TUNNEL_MASK (0xFULL << 45) > + Above flag bits are added so that i40e driver can tell tunnel type of this packet (udp or gre or ipip), just interested to know how about just do a simple analysis like below without introducing these flags? if outer_ether.proto == ipv4 l4_proto = ipv4_hdr->next_proto; else outer_ether.proto == ipv6 l4_proto = ipv6_hdr->next_proto; switch (l4_proto) case ipv4: case ipv6: tunnel_type = ipip; break; case udp: tunnel_type = udp; break; case gre: tunnel_type = gre; break; default: error; Thanks, Jianfeng > +/** > * Second VLAN insertion (QinQ) flag. > */ > #define PKT_TX_QINQ_PKT (1ULL << 49) /**< TX packet with double VLAN inserted. */ > @@ -867,7 +878,10 @@ struct rte_mbuf { > union { > uint64_t tx_offload; /**< combined for easy fetch */ > struct { > - uint64_t l2_len:7; /**< L2 (MAC) Header Length. */ > + uint64_t l2_len:7; > + /**< L2 (MAC) Header Length if it isn't a tunneling pkt. > + * for tunnel it is outer L4 len+tunnel len+inner L2 len > + */ > uint64_t l3_len:9; /**< L3 (IP) Header Length. */ > uint64_t l4_len:8; /**< L4 (TCP/UDP) Header Length. */ > uint64_t tso_segsz:16; /**< TCP TSO segment size */